forked from OSchip/llvm-project
338 lines
11 KiB
C++
338 lines
11 KiB
C++
//===- Chunks.cpp ---------------------------------------------------------===//
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//
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// The LLVM Linker
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "Chunks.h"
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#include "Error.h"
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#include "InputFiles.h"
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#include "Symbols.h"
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#include "llvm/Object/COFF.h"
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#include "llvm/Support/COFF.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/Endian.h"
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#include "llvm/Support/raw_ostream.h"
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#include <algorithm>
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using namespace llvm;
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using namespace llvm::object;
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using namespace llvm::support::endian;
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using namespace llvm::COFF;
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using llvm::support::ulittle32_t;
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namespace lld {
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namespace coff {
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SectionChunk::SectionChunk(ObjectFile *F, const coff_section *H)
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: Chunk(SectionKind), Repl(this), File(F), Header(H),
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Relocs(File->getCOFFObj()->getRelocations(Header)),
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NumRelocs(std::distance(Relocs.begin(), Relocs.end())) {
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// Initialize SectionName.
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File->getCOFFObj()->getSectionName(Header, SectionName);
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Align = Header->getAlignment();
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// Only COMDAT sections are subject of dead-stripping.
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Live = !isCOMDAT();
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}
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static void add16(uint8_t *P, int16_t V) { write16le(P, read16le(P) + V); }
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static void add32(uint8_t *P, int32_t V) { write32le(P, read32le(P) + V); }
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static void add64(uint8_t *P, int64_t V) { write64le(P, read64le(P) + V); }
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static void or16(uint8_t *P, uint16_t V) { write16le(P, read16le(P) | V); }
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void SectionChunk::applyRelX64(uint8_t *Off, uint16_t Type, Defined *Sym,
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uint64_t P) const {
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uint64_t S = Sym->getRVA();
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switch (Type) {
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case IMAGE_REL_AMD64_ADDR32: add32(Off, S + Config->ImageBase); break;
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case IMAGE_REL_AMD64_ADDR64: add64(Off, S + Config->ImageBase); break;
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case IMAGE_REL_AMD64_ADDR32NB: add32(Off, S); break;
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case IMAGE_REL_AMD64_REL32: add32(Off, S - P - 4); break;
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case IMAGE_REL_AMD64_REL32_1: add32(Off, S - P - 5); break;
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case IMAGE_REL_AMD64_REL32_2: add32(Off, S - P - 6); break;
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case IMAGE_REL_AMD64_REL32_3: add32(Off, S - P - 7); break;
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case IMAGE_REL_AMD64_REL32_4: add32(Off, S - P - 8); break;
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case IMAGE_REL_AMD64_REL32_5: add32(Off, S - P - 9); break;
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case IMAGE_REL_AMD64_SECTION: add16(Off, Sym->getSectionIndex()); break;
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case IMAGE_REL_AMD64_SECREL: add32(Off, Sym->getSecrel()); break;
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default:
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error("Unsupported relocation type");
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}
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}
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void SectionChunk::applyRelX86(uint8_t *Off, uint16_t Type, Defined *Sym,
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uint64_t P) const {
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uint64_t S = Sym->getRVA();
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switch (Type) {
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case IMAGE_REL_I386_ABSOLUTE: break;
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case IMAGE_REL_I386_DIR32: add32(Off, S + Config->ImageBase); break;
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case IMAGE_REL_I386_DIR32NB: add32(Off, S); break;
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case IMAGE_REL_I386_REL32: add32(Off, S - P - 4); break;
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case IMAGE_REL_I386_SECTION: add16(Off, Sym->getSectionIndex()); break;
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case IMAGE_REL_I386_SECREL: add32(Off, Sym->getSecrel()); break;
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default:
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error("Unsupported relocation type");
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}
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}
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static void applyMOV(uint8_t *Off, uint16_t V) {
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or16(Off, ((V & 0x800) >> 1) | ((V >> 12) & 0xf));
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or16(Off + 2, ((V & 0x700) << 4) | (V & 0xff));
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}
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static void applyMOV32T(uint8_t *Off, uint32_t V) {
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applyMOV(Off, V); // set MOVW operand
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applyMOV(Off + 4, V >> 16); // set MOVT operand
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}
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static void applyBranch20T(uint8_t *Off, int32_t V) {
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uint32_t S = V < 0 ? 1 : 0;
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uint32_t J1 = (V >> 19) & 1;
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uint32_t J2 = (V >> 18) & 1;
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or16(Off, (S << 10) | ((V >> 12) & 0x3f));
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or16(Off + 2, (J1 << 13) | (J2 << 11) | ((V >> 1) & 0x7ff));
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}
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static void applyBranch24T(uint8_t *Off, int32_t V) {
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uint32_t S = V < 0 ? 1 : 0;
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uint32_t J1 = ((~V >> 23) & 1) ^ S;
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uint32_t J2 = ((~V >> 22) & 1) ^ S;
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or16(Off, (S << 10) | ((V >> 12) & 0x3ff));
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or16(Off + 2, (J1 << 13) | (J2 << 11) | ((V >> 1) & 0x7ff));
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}
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void SectionChunk::applyRelARM(uint8_t *Off, uint16_t Type, Defined *Sym,
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uint64_t P) const {
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uint64_t S = Sym->getRVA();
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// Pointer to thumb code must have the LSB set.
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if (Sym->isExecutable())
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S |= 1;
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switch (Type) {
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case IMAGE_REL_ARM_ADDR32: add32(Off, S + Config->ImageBase); break;
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case IMAGE_REL_ARM_ADDR32NB: add32(Off, S); break;
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case IMAGE_REL_ARM_MOV32T: applyMOV32T(Off, S + Config->ImageBase); break;
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case IMAGE_REL_ARM_BRANCH20T: applyBranch20T(Off, S - P - 4); break;
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case IMAGE_REL_ARM_BRANCH24T: applyBranch24T(Off, S - P - 4); break;
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case IMAGE_REL_ARM_BLX23T: applyBranch24T(Off, S - P - 4); break;
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default:
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error("Unsupported relocation type");
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}
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}
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void SectionChunk::writeTo(uint8_t *Buf) const {
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if (!hasData())
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return;
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// Copy section contents from source object file to output file.
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ArrayRef<uint8_t> A = getContents();
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memcpy(Buf + OutputSectionOff, A.data(), A.size());
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// Apply relocations.
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for (const coff_relocation &Rel : Relocs) {
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uint8_t *Off = Buf + OutputSectionOff + Rel.VirtualAddress;
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SymbolBody *Body = File->getSymbolBody(Rel.SymbolTableIndex)->repl();
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Defined *Sym = cast<Defined>(Body);
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uint64_t P = RVA + Rel.VirtualAddress;
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switch (Config->Machine) {
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case AMD64:
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applyRelX64(Off, Rel.Type, Sym, P);
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break;
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case I386:
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applyRelX86(Off, Rel.Type, Sym, P);
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break;
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case ARMNT:
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applyRelARM(Off, Rel.Type, Sym, P);
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break;
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default:
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llvm_unreachable("unknown machine type");
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}
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}
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}
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void SectionChunk::addAssociative(SectionChunk *Child) {
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AssocChildren.push_back(Child);
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}
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static uint8_t getBaserelType(const coff_relocation &Rel) {
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switch (Config->Machine) {
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case AMD64:
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if (Rel.Type == IMAGE_REL_AMD64_ADDR64)
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return IMAGE_REL_BASED_DIR64;
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return IMAGE_REL_BASED_ABSOLUTE;
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case I386:
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if (Rel.Type == IMAGE_REL_I386_DIR32)
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return IMAGE_REL_BASED_HIGHLOW;
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return IMAGE_REL_BASED_ABSOLUTE;
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case ARMNT:
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if (Rel.Type == IMAGE_REL_ARM_ADDR32)
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return IMAGE_REL_BASED_HIGHLOW;
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if (Rel.Type == IMAGE_REL_ARM_MOV32T)
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return IMAGE_REL_BASED_ARM_MOV32T;
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return IMAGE_REL_BASED_ABSOLUTE;
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default:
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llvm_unreachable("unknown machine type");
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}
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}
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// Windows-specific.
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// Collect all locations that contain absolute addresses, which need to be
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// fixed by the loader if load-time relocation is needed.
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// Only called when base relocation is enabled.
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void SectionChunk::getBaserels(std::vector<Baserel> *Res) {
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for (const coff_relocation &Rel : Relocs) {
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uint8_t Ty = getBaserelType(Rel);
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if (Ty == IMAGE_REL_BASED_ABSOLUTE)
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continue;
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SymbolBody *Body = File->getSymbolBody(Rel.SymbolTableIndex)->repl();
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if (isa<DefinedAbsolute>(Body))
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continue;
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Res->emplace_back(RVA + Rel.VirtualAddress, Ty);
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}
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}
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bool SectionChunk::hasData() const {
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return !(Header->Characteristics & IMAGE_SCN_CNT_UNINITIALIZED_DATA);
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}
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uint32_t SectionChunk::getPermissions() const {
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return Header->Characteristics & PermMask;
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}
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bool SectionChunk::isCOMDAT() const {
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return Header->Characteristics & IMAGE_SCN_LNK_COMDAT;
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}
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void SectionChunk::printDiscardedMessage() const {
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// Removed by dead-stripping. If it's removed by ICF, ICF already
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// printed out the name, so don't repeat that here.
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if (Sym && this == Repl)
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llvm::outs() << "Discarded " << Sym->getName() << "\n";
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}
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StringRef SectionChunk::getDebugName() {
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if (Sym)
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return Sym->getName();
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return "";
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}
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ArrayRef<uint8_t> SectionChunk::getContents() const {
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ArrayRef<uint8_t> A;
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File->getCOFFObj()->getSectionContents(Header, A);
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return A;
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}
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void SectionChunk::replace(SectionChunk *Other) {
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Other->Repl = Repl;
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Other->Live = false;
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}
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CommonChunk::CommonChunk(const COFFSymbolRef S) : Sym(S) {
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// Common symbols are aligned on natural boundaries up to 32 bytes.
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// This is what MSVC link.exe does.
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Align = std::min(uint64_t(32), NextPowerOf2(Sym.getValue()));
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}
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uint32_t CommonChunk::getPermissions() const {
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return IMAGE_SCN_CNT_UNINITIALIZED_DATA | IMAGE_SCN_MEM_READ |
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IMAGE_SCN_MEM_WRITE;
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}
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void StringChunk::writeTo(uint8_t *Buf) const {
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memcpy(Buf + OutputSectionOff, Str.data(), Str.size());
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}
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ImportThunkChunkX64::ImportThunkChunkX64(Defined *S) : ImpSymbol(S) {
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// Intel Optimization Manual says that all branch targets
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// should be 16-byte aligned. MSVC linker does this too.
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Align = 16;
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}
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void ImportThunkChunkX64::writeTo(uint8_t *Buf) const {
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memcpy(Buf + OutputSectionOff, ImportThunkX86, sizeof(ImportThunkX86));
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// The first two bytes is a JMP instruction. Fill its operand.
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write32le(Buf + OutputSectionOff + 2, ImpSymbol->getRVA() - RVA - getSize());
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}
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void ImportThunkChunkX86::getBaserels(std::vector<Baserel> *Res) {
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Res->emplace_back(getRVA() + 2);
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}
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void ImportThunkChunkX86::writeTo(uint8_t *Buf) const {
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memcpy(Buf + OutputSectionOff, ImportThunkX86, sizeof(ImportThunkX86));
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// The first two bytes is a JMP instruction. Fill its operand.
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write32le(Buf + OutputSectionOff + 2,
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ImpSymbol->getRVA() + Config->ImageBase);
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}
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void ImportThunkChunkARM::getBaserels(std::vector<Baserel> *Res) {
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Res->emplace_back(getRVA(), IMAGE_REL_BASED_ARM_MOV32T);
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}
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void ImportThunkChunkARM::writeTo(uint8_t *Buf) const {
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memcpy(Buf + OutputSectionOff, ImportThunkARM, sizeof(ImportThunkARM));
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// Fix mov.w and mov.t operands.
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applyMOV32T(Buf + OutputSectionOff, ImpSymbol->getRVA() + Config->ImageBase);
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}
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void LocalImportChunk::getBaserels(std::vector<Baserel> *Res) {
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Res->emplace_back(getRVA());
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}
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size_t LocalImportChunk::getSize() const {
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return Config->is64() ? 8 : 4;
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}
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void LocalImportChunk::writeTo(uint8_t *Buf) const {
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if (Config->is64()) {
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write64le(Buf + OutputSectionOff, Sym->getRVA() + Config->ImageBase);
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} else {
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write32le(Buf + OutputSectionOff, Sym->getRVA() + Config->ImageBase);
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}
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}
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void SEHTableChunk::writeTo(uint8_t *Buf) const {
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ulittle32_t *Begin = reinterpret_cast<ulittle32_t *>(Buf + OutputSectionOff);
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size_t Cnt = 0;
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for (Defined *D : Syms)
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Begin[Cnt++] = D->getRVA();
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std::sort(Begin, Begin + Cnt);
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}
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// Windows-specific.
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// This class represents a block in .reloc section.
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BaserelChunk::BaserelChunk(uint32_t Page, Baserel *Begin, Baserel *End) {
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// Block header consists of 4 byte page RVA and 4 byte block size.
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// Each entry is 2 byte. Last entry may be padding.
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Data.resize(alignTo((End - Begin) * 2 + 8, 4));
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uint8_t *P = Data.data();
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write32le(P, Page);
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write32le(P + 4, Data.size());
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P += 8;
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for (Baserel *I = Begin; I != End; ++I) {
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write16le(P, (I->Type << 12) | (I->RVA - Page));
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P += 2;
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}
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}
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void BaserelChunk::writeTo(uint8_t *Buf) const {
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memcpy(Buf + OutputSectionOff, Data.data(), Data.size());
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}
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uint8_t Baserel::getDefaultType() {
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switch (Config->Machine) {
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case AMD64:
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return IMAGE_REL_BASED_DIR64;
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case I386:
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return IMAGE_REL_BASED_HIGHLOW;
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default:
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llvm_unreachable("unknown machine type");
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}
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}
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} // namespace coff
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} // namespace lld
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