llvm-project/llvm/test/CodeGen
Mircea Trofin ce61def529 [regalloc] Ensure Query::collectInterferringVregs is called before interval iteration
The main part of the patch is the change in RegAllocGreedy.cpp: Q.collectInterferringVregs()
needs to be called before iterating the interfering live ranges.

The rest of the patch offers support that is the case: instead of  clearing the query's
InterferingVRegs field, we invalidate it. The clearing happens when the live reg matrix
is invalidated (existing triggering mechanism).

Without the change in RegAllocGreedy.cpp, the compiler ices.

This patch should make it more easily discoverable by developers that
collectInterferringVregs needs to be called before iterating.

I will follow up with a subsequent patch to improve the usability and maintainability of Query.

Differential Revision: https://reviews.llvm.org/D98232
2021-04-01 08:33:28 -07:00
..
AArch64 [regalloc] Ensure Query::collectInterferringVregs is called before interval iteration 2021-04-01 08:33:28 -07:00
AMDGPU [AMDGPU] Enable output modifiers for double precision instructions 2021-04-01 10:08:17 -04:00
ARC
ARM Support {S,U}REMEqFold before legalization 2021-04-01 01:35:41 +03:00
AVR [AVR] Fix lifeness issues in the AVR backend 2021-03-04 14:04:39 +01:00
BPF BPF: add extern func to data sections if specified 2021-03-25 16:03:29 -07:00
Generic Re-apply "[lli] Make -jit-kind=orc the default JIT engine" 2021-03-30 12:08:26 +02:00
Hexagon [Hexagon] Add support for named registers cs0 and cs1 2021-03-18 09:53:22 -05:00
Inputs
Lanai
M68k [DAG] computeKnownBits - add ISD::MULHS/MULHU/SMUL_LOHI/UMUL_LOHI handling 2021-03-19 16:02:31 +00:00
MIR MIR: Fix missing serialization for HasTailCall 2021-03-21 13:14:04 -04:00
MSP430
Mips Support {S,U}REMEqFold before legalization 2021-04-01 01:35:41 +03:00
NVPTX [NVPTX] CUDA does provide malloc/free since compute capability 2.X 2021-03-15 22:45:56 -05:00
PowerPC Support {S,U}REMEqFold before legalization 2021-04-01 01:35:41 +03:00
RISCV Support {S,U}REMEqFold before legalization 2021-04-01 01:35:41 +03:00
SPARC [LegalizeTypes] Improve ExpandIntRes_XMULO codegen. 2021-03-01 09:54:32 -08:00
SystemZ [SystemZ] Reimplement the i8/i16 compare-and-swap logic. 2021-03-03 14:04:32 -06:00
Thumb Support {S,U}REMEqFold before legalization 2021-04-01 01:35:41 +03:00
Thumb2 Support {S,U}REMEqFold before legalization 2021-04-01 01:35:41 +03:00
VE [test] Fix CodeGen/VE/Scalar tests 2021-03-02 15:30:44 -08:00
WebAssembly [WebAssembly] Invert branch condition on xor input 2021-04-01 09:23:28 +01:00
WinCFGuard
WinEH
X86 [regalloc] Ensure Query::collectInterferringVregs is called before interval iteration 2021-04-01 08:33:28 -07:00
XCore [CodeGen] Report a normal instead of fatal error for label redefinition 2021-03-09 10:54:41 +00:00