..
AArch64
[llvm][ELF][AArch64] Handle R_AARCH64_PLT32 relocation
2020-06-10 11:34:16 -07:00
AMDGPU
[AMDGPU] Add gfx1030 target
2020-06-15 16:18:05 -07:00
ARM
[DebugInfo] Report the format of location and range lists [9/10]
2020-06-02 17:55:31 +07:00
AVR
[AVR] Implement disassembly support for I/O instructions
2020-06-10 20:55:47 +02:00
AsmParser
Fix debug line info when line markers are present inside macros.
2020-06-16 16:13:11 +01:00
BPF
[test] llvm/test/: change llvm-objdump single-dash long options to double-dash options
2020-03-15 17:46:23 -07:00
COFF
[MC] Add --dwarf64 to generate DWARF64 debug info [1/7]
2020-06-16 15:50:13 +07:00
Disassembler
[AMDGPU] Add gfx1030 target
2020-06-15 16:18:05 -07:00
ELF
[llvm-readobj] set --elf-cg-profile as alias of --cg-profile
2020-06-17 11:24:45 -07:00
Hexagon
[Hexagon] pX.new cannot be used with p3:0 as producer
2020-05-19 17:06:34 -05:00
Lanai
[lit] Delete empty lines at the end of lit.local.cfg NFC
2019-06-17 09:51:07 +00:00
MSP430
[test] llvm/test/: change llvm-objdump single-dash long options to double-dash options
2020-03-15 17:46:23 -07:00
MachO
[MC] Generate .debug_frame in the 64-bit DWARF format [7/7]
2020-06-16 15:50:14 +07:00
Mips
[DebugInfo] Report the format of call frame information entries [6/10]
2020-06-02 17:55:30 +07:00
PowerPC
[PowerPC] Add some InstAlias for mtspr/mfspr instructions
2020-06-15 02:43:13 +00:00
RISCV
Revert "[llvm][test] Add COM: directives before colon-less non-CHECKs in comments. NFC"
2020-05-22 05:36:15 -06:00
Sparc
[Object] Change ELFObjectFile<ELFT>::getFileFormatName() to use BFD names
2020-03-16 07:42:04 -07:00
SystemZ
[SystemZ] Allow specifying plain register numbers in AsmParser
2020-04-29 20:42:30 +02:00
VE
[VE] Support relocation information in MC layer
2020-06-15 11:24:53 +02:00
WebAssembly
[WebAssembly] Adding 64-bit version of R_WASM_MEMORY_ADDR_* relocs
2020-06-15 10:07:42 -07:00
X86
[X86] Force VIA PadLock crypto instructions to emit a 0xF3 prefix when they encode to match what GNU as does.
2020-06-11 12:59:21 -07:00