| .. |
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add_reduce.mir
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[llvm][mlir] Promote the experimental reduction intrinsics to be first class intrinsics.
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2020-10-07 10:36:44 -07:00 |
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begin-vpt-without-inst.mir
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[ARM] Change VPT state assertion
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2020-09-30 08:01:10 +01:00 |
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biquad-cascade-default.mir
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[NFC][ARM] Add more LowOverheadLoop tests.
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2020-09-30 12:20:07 +01:00 |
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biquad-cascade-optsize-strd-lr.mir
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[RDA] isSafeToDefRegAt: Look at global uses
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2020-09-30 14:06:45 +01:00 |
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biquad-cascade-optsize.mir
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[NFC][ARM] Add more LowOverheadLoop tests.
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2020-09-30 12:20:07 +01:00 |
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branch-targets.ll
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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clear-maskedinsts.ll
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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cmplx_cong.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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cond-mov.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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cond-vector-reduce-mve-codegen.ll
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[ARM] Add a RegAllocHint for hinting t2DoLoopStart towards LR
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2020-11-10 16:28:57 +00:00 |
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count_dominates_start.mir
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[ARM] Ensure CountReg definition dominates InsertPt when creating t2DoLoopStartTP
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2020-11-12 13:47:46 +00:00 |
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ctlz-non-zeros.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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disjoint-vcmp.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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dont-ignore-vctp.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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dont-remove-loop-update.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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emptyblock.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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end-positive-offset.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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exitcount.ll
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[ARM] Introduce t2DoLoopStartTP
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2020-11-10 18:08:12 +00:00 |
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extending-loads.ll
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[ARM] Add a RegAllocHint for hinting t2DoLoopStart towards LR
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2020-11-10 16:28:57 +00:00 |
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extract-element.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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fast-fp-loops.ll
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[ARM] Disable WLSTP loops
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2020-11-20 13:30:44 +00:00 |
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incorrect-sub-8.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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incorrect-sub-16.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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incorrect-sub-32.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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inlineasm.ll
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[ARM] Deliberately prevent inline asm in low overhead loops. NFC
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2020-11-19 13:28:21 +00:00 |
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inloop-vpnot-1.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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inloop-vpnot-2.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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inloop-vpnot-3.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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inloop-vpsel-1.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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inloop-vpsel-2.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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invariant-qreg.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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it-block-chain-store.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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it-block-chain.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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it-block-itercount.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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it-block-mov.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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it-block-random.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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iv-two-vcmp-reordered.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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iv-two-vcmp.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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iv-vcmp.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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livereg-no-loop-def.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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loop-dec-copy-chain.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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loop-dec-copy-prev-iteration.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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loop-dec-liveout.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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loop-guards.ll
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[ARM] Add a RegAllocHint for hinting t2DoLoopStart towards LR
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2020-11-10 16:28:57 +00:00 |
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lsr-profitable-chain.ll
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[ARM][MVE] Refactor option -disable-mve-tail-predication
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2020-07-13 13:40:33 +01:00 |
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lstp-insertion-position.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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massive.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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matrix-debug.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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matrix.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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memcall.ll
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[ARM] Treat memcpy/memset/memmove as call instructions for low overhead loops
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2020-11-03 11:53:09 +00:00 |
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mov-after-dls.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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mov-after-dlstp.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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mov-lr-terminator.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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mov-operand.ll
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[ARM] Disable WLSTP loops
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2020-11-20 13:30:44 +00:00 |
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move-def-before-start.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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move-start-after-def.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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multi-block-cond-iter-count.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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multi-cond-iter-count.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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multiblock-massive.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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multiple-do-loops.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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mve-float-loops.ll
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[ARM] Add a RegAllocHint for hinting t2DoLoopStart towards LR
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2020-11-10 16:28:57 +00:00 |
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mve-tail-data-types.ll
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[ARM] Disable WLSTP loops
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2020-11-20 13:30:44 +00:00 |
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nested.ll
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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no-dec-cbnz.mir
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[ARM] Make MachineVerifier more strict about terminators
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2020-08-27 07:10:20 +01:00 |
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no-dec-le-simple.ll
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[ARM] LE support in ConstantIslands
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2019-09-17 09:08:05 +00:00 |
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no-dec-reorder.mir
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[ARM] Make MachineVerifier more strict about terminators
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2020-08-27 07:10:20 +01:00 |
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no-dec.mir
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[ARM] Make MachineVerifier more strict about terminators
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2020-08-27 07:10:20 +01:00 |
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no-vpsel-liveout.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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non-masked-load.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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non-masked-store.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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out-of-range-cbz.mir
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[MIR][ARM] MachineOperand comments
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2020-02-24 14:19:21 +00:00 |
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predicated-invariant.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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predicated-liveout-unknown-lanes.ll
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[Thumb2] Regenerate predicated-liveout-unknown-lanes.ll test
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2020-12-02 18:00:42 +00:00 |
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predicated-liveout.mir
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[llvm][mlir] Promote the experimental reduction intrinsics to be first class intrinsics.
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2020-10-07 10:36:44 -07:00 |
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reductions-vpt-liveout.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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reductions.ll
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[ARM] Disable WLSTP loops
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2020-11-20 13:30:44 +00:00 |
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remat-vctp.ll
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[ARM] Add a RegAllocHint for hinting t2DoLoopStart towards LR
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2020-11-10 16:28:57 +00:00 |
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remove-elem-moves.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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revert-after-call.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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revert-after-read.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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revert-after-write.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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revert-non-header.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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revert-non-loop.mir
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[ARM][LowOverheadLoops] Use tBcc when reverting
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2019-09-23 08:35:31 +00:00 |
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revert-while.mir
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[MIR][ARM] MachineOperand comments
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2020-02-24 14:19:21 +00:00 |
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safe-def-no-mov.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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safe-retaining.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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sibling-loops.ll
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[ARM] Add a RegAllocHint for hinting t2DoLoopStart towards LR
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2020-11-10 16:28:57 +00:00 |
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size-limit.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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skip-debug.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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switch.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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tail-pred-basic.ll
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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tail-pred-const.ll
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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tail-pred-disabled-in-loloops.ll
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[ARM] Add a RegAllocHint for hinting t2DoLoopStart towards LR
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2020-11-10 16:28:57 +00:00 |
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tail-pred-intrinsic-add-sat.ll
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[ARM] Make MachineVerifier more strict about terminators
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2020-08-27 07:10:20 +01:00 |
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tail-pred-intrinsic-fabs.ll
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[ARM] Make MachineVerifier more strict about terminators
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2020-08-27 07:10:20 +01:00 |
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tail-pred-intrinsic-round.ll
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[ARM] Cleanup for the MVETailPrediction pass
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2020-11-26 15:10:44 +00:00 |
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tail-pred-intrinsic-sub-sat.ll
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[ARM] Fixup of a few test cases. NFC.
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2020-09-09 11:14:44 +01:00 |
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tail-pred-narrow.ll
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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tail-pred-pattern-fail.ll
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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tail-pred-reduce.ll
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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tail-pred-widen.ll
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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tp-multiple-vpst.ll
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[ARM] Add a RegAllocHint for hinting t2DoLoopStart towards LR
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2020-11-10 16:28:57 +00:00 |
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unpredicated-max.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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unpredload.ll
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[ARM] Add a RegAllocHint for hinting t2DoLoopStart towards LR
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2020-11-10 16:28:57 +00:00 |
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unrolled-and-vector.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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unsafe-cpsr-loop-def.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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unsafe-cpsr-loop-use.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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unsafe-retaining.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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unsafe-use-after.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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vaddv.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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varying-outer-2d-reduction.ll
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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vcmp-vpst-combination-across-blocks.mir
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[ARM][LowOverheadLoops] Convert intermediate vpr use assertion to condition
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2020-11-19 17:15:45 +00:00 |
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vcmp-vpst-combination.ll
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[ARM] Add a RegAllocHint for hinting t2DoLoopStart towards LR
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2020-11-10 16:28:57 +00:00 |
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vctp-add-operand-liveout.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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vctp-in-vpt-2.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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vctp-in-vpt.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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vctp-subi3.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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vctp-subri.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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vctp-subri12.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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vctp16-reduce.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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vector-arith-codegen.ll
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[ARM] Add a RegAllocHint for hinting t2DoLoopStart towards LR
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2020-11-10 16:28:57 +00:00 |
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vector-reduce-mve-tail.ll
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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vector-unroll.ll
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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vmaxmin_vpred_r.mir
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[MIR][ARM] MachineOperand comments
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2020-02-24 14:19:21 +00:00 |
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vmldava_in_vpt.mir
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[MIR][ARM] MachineOperand comments
|
2020-02-24 14:19:21 +00:00 |
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vpt-blocks.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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while-loops.ll
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[ARM] Disable WLSTP loops
|
2020-11-20 13:30:44 +00:00 |
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while-negative-offset.mir
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[ARM][LowOverheadLoops] Add LR def safety check
|
2019-09-17 12:19:32 +00:00 |
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while.mir
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[MIR][ARM] MachineOperand comments
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2020-02-24 14:19:21 +00:00 |
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wlstp.mir
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[llvm][mlir] Promote the experimental reduction intrinsics to be first class intrinsics.
|
2020-10-07 10:36:44 -07:00 |
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wrong-liveout-lsr-shift.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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wrong-vctp-opcode-liveout.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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wrong-vctp-operand-liveout.mir
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[ARM] Alter t2DoLoopStart to define lr
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2020-11-10 15:57:58 +00:00 |
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