forked from OSchip/llvm-project
89 lines
3.9 KiB
ArmAsm
89 lines
3.9 KiB
ArmAsm
// REQUIRES: arm
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// RUN: llvm-mc -filetype=obj -triple=thumbv7a-none-linux-gnueabi %s -o %t
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// RUN: ld.lld %t --shared -o %t.so
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// The output file is large, most of it zeroes. We dissassemble only the
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// parts we need to speed up the test and avoid a large output file
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// RUN: llvm-objdump -d %t.so -start-address=8388608 -stop-address=8388624 -triple=thumbv7a-linux-gnueabihf | FileCheck -check-prefix=CHECK1 %s
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// RUN: llvm-objdump -d %t.so -start-address=16777216 -stop-address=16777256 -triple=thumbv7a-linux-gnueabihf | FileCheck -check-prefix=CHECK2 %s
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// RUN: llvm-objdump -d %t.so -start-address=25165824 -stop-address=25165828 -triple=thumbv7a-linux-gnueabihf | FileCheck -check-prefix=CHECK3 %s
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// RUN: llvm-objdump -d %t.so -start-address=25165828 -stop-address=25165908 -triple=armv7a-linux-gnueabihf | FileCheck -check-prefix=CHECK4 %s
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.syntax unified
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.thumb
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// Make sure that we generate a range extension thunk to a PLT entry
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.section ".text.1", "ax", %progbits
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.global sym1
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.global elsewhere
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.type elsewhere, %function
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.global preemptible
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.type preemptible, %function
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.global far_preemptible
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.type far_preemptible, %function
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sym1:
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bl elsewhere
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bl preemptible
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bx lr
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preemptible:
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bl far_preemptible
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bx lr
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// CHECK1: Disassembly of section .text:
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// CHECK1-NEXT: sym1:
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// CHECK1-NEXT: 800000: 00 f0 00 d8 bl #8388608
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// CHECK1-NEXT: 800004: 00 f0 04 d8 bl #8388616
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// CHECK1-NEXT: 800008: 70 47 bx lr
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// CHECK1: preemptible:
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// CHECK1-NEXT: 80000a: 00 f0 07 d8 bl #8388622
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// CHECK1-NEXT: 80000e: 70 47 bx lr
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.section .text.2, "ax", %progbits
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.balign 0x0800000
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bx lr
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// CHECK2: __ThumbV7PILongThunk_elsewhere:
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// CHECK2-NEXT: 1000004: 40 f2 14 0c movw r12, #20
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// CHECK2-NEXT: 1000008: c0 f2 80 0c movt r12, #128
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// CHECK2-NEXT: 100000c: fc 44 add r12, pc
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// CHECK2-NEXT: 100000e: 60 47 bx r12
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// CHECK2: __ThumbV7PILongThunk_preemptible:
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// CHECK2-NEXT: 1000010: 40 f2 18 0c movw r12, #24
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// CHECK2-NEXT: 1000014: c0 f2 80 0c movt r12, #128
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// CHECK2-NEXT: 1000018: fc 44 add r12, pc
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// CHECK2-NEXT: 100001a: 60 47 bx r12
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// CHECK2: __ThumbV7PILongThunk_far_preemptible:
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// CHECK2-NEXT: 100001c: 40 f2 1c 0c movw r12, #28
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// CHECK2-NEXT: 1000020: c0 f2 80 0c movt r12, #128
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// CHECK2-NEXT: 1000024: fc 44 add r12, pc
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// CHECK2-NEXT: 1000026: 60 47 bx r12
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.section .text.3, "ax", %progbits
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.balign 0x0800000
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far_preemptible:
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bl elsewhere
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// CHECK3: far_preemptible:
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// CHECK3: 1800000: 00 f0 10 e8 blx #32
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// CHECK4: Disassembly of section .plt:
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// CHECK4-NEXT: $a:
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// CHECK4-NEXT: 1800010: 04 e0 2d e5 str lr, [sp, #-4]!
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// CHECK4-NEXT: 1800014: 04 e0 9f e5 ldr lr, [pc, #4]
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// CHECK4-NEXT: 1800018: 0e e0 8f e0 add lr, pc, lr
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// CHECK4-NEXT: 180001c: 08 f0 be e5 ldr pc, [lr, #8]!
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// CHECK4: $d:
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// CHECK4-NEXT: 1800020: e0 0f 00 00 .word 0x00000fe0
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// CHECK4: $a:
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// CHECK4-NEXT: 1800024: 04 c0 9f e5 ldr r12, [pc, #4]
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// CHECK4-NEXT: 1800028: 0f c0 8c e0 add r12, r12, pc
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// CHECK4-NEXT: 180002c: 00 f0 9c e5 ldr pc, [r12]
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// CHECK4: $d:
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// CHECK4-NEXT: 1800030: dc 0f 00 00 .word 0x00000fdc
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// CHECK4: $a:
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// CHECK4-NEXT: 1800034: 04 c0 9f e5 ldr r12, [pc, #4]
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// CHECK4-NEXT: 1800038: 0f c0 8c e0 add r12, r12, pc
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// CHECK4-NEXT: 180003c: 00 f0 9c e5 ldr pc, [r12]
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// CHECK4: $d:
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// CHECK4-NEXT: 1800040: d0 0f 00 00 .word 0x00000fd0
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// CHECK4: $a:
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// CHECK4-NEXT: 1800044: 04 c0 9f e5 ldr r12, [pc, #4]
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// CHECK4-NEXT: 1800048: 0f c0 8c e0 add r12, r12, pc
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// CHECK4-NEXT: 180004c: 00 f0 9c e5 ldr pc, [r12]
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// CHECK4: $d:
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// CHECK4-NEXT: 1800050: c4 0f 00 00 .word 0x00000fc4
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