llvm-project/llvm/test/CodeGen
Quentin Colombet d1cd30b218 [AArch64][RegisterBankInfo] G_OR are fine on either GPR or FPR.
Teach AArch64RegisterBankInfo that G_OR can be mapped on either GPR or
FPR for 64-bit or 32-bit values.

Add test cases demonstrating how this information is used to coalesce a
computation on a single register bank.

llvm-svn: 272170
2016-06-08 16:53:32 +00:00
..
AArch64 [AArch64][RegisterBankInfo] G_OR are fine on either GPR or FPR. 2016-06-08 16:53:32 +00:00
AMDGPU AMDGPU: Add amdgpu-ps-wqm-outputs function attributes 2016-06-07 21:37:17 +00:00
ARM [ARM] MSR instructions implicitly set CPSR 2016-06-08 15:26:34 +00:00
BPF [BPF] Remove exit-on-error from tests (PR27768, PR27769) 2016-05-30 08:28:34 +00:00
Generic llc: Rework -run-pass option 2016-05-10 01:32:44 +00:00
Hexagon [Hexagon] Enable the post-RA scheduler 2016-05-26 19:44:28 +00:00
Inputs [PR27284] Reverse the ownership between DICompileUnit and DISubprogram. 2016-04-15 15:57:41 +00:00
Lanai [lanai] Change reloc to use PIC_ by default and cleanup. 2016-05-20 21:41:53 +00:00
MIR MIR: Fix parsing of stack object references in MachineMemOperands 2016-06-08 00:47:07 +00:00
MSP430 `MSP430InstrInfo::loadRegFromStackSlot` forgets to set register def. 2016-02-24 15:15:02 +00:00
Mips [mips] Implement 'la' macro in PIC mode for O32. 2016-06-03 09:53:06 +00:00
NVPTX [NVPTX] Added NVVMIntrRange pass 2016-05-26 17:02:56 +00:00
PowerPC [PowerPC] Support multiple return values with fast isel 2016-06-07 12:48:22 +00:00
SPARC [Sparc] Allow passing of empty structs. 2016-06-01 08:48:56 +00:00
SystemZ [SystemZ] Fix register ordering for BinaryRRF instructions 2016-05-18 13:24:57 +00:00
Thumb [Thumb-1] Add optimized constant materialization for integers [256..512) 2016-06-07 13:10:14 +00:00
Thumb2 ARM: stop emitting blx instructions for most calls on MachO. 2016-05-10 19:17:47 +00:00
WebAssembly [WebAssembly] Emit type signatures for declared functions 2016-06-03 18:34:36 +00:00
WinEH [PR27284] Reverse the ownership between DICompileUnit and DISubprogram. 2016-04-15 15:57:41 +00:00
X86 [X86][SSE4A] Regenerated SSE4A intrinsics tests 2016-06-07 21:15:45 +00:00
XCore [PR27284] Reverse the ownership between DICompileUnit and DISubprogram. 2016-04-15 15:57:41 +00:00