forked from OSchip/llvm-project
62 lines
2.2 KiB
LLVM
62 lines
2.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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;RUN: llc -mtriple=x86_64-apple-darwin -mcpu=skx < %s | FileCheck %s
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define i32 @combineTESTM_AND_1(<8 x i64> %a, <8 x i64> %b) {
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; CHECK-LABEL: combineTESTM_AND_1:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vptestmq %zmm0, %zmm1, %k0
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; CHECK-NEXT: kmovb %k0, %eax
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; CHECK-NEXT: movzbl %al, %eax
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; CHECK-NEXT: retq
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%and.i = and <8 x i64> %b, %a
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%test.i = tail call i8 @llvm.x86.avx512.ptestm.q.512(<8 x i64> %and.i, <8 x i64> %and.i, i8 -1)
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%conv = zext i8 %test.i to i32
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ret i32 %conv
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}
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define i32 @combineTESTM_AND_2(<8 x i64> %a, <8 x i64> %b , i8 %mask) {
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; CHECK-LABEL: combineTESTM_AND_2:
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; CHECK: ## BB#0:
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; CHECK-NEXT: kmovb %edi, %k1
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; CHECK-NEXT: vptestmq %zmm0, %zmm1, %k0 {%k1}
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; CHECK-NEXT: kmovb %k0, %eax
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; CHECK-NEXT: movzbl %al, %eax
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; CHECK-NEXT: retq
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%and.i = and <8 x i64> %b, %a
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%test.i = tail call i8 @llvm.x86.avx512.ptestm.q.512(<8 x i64> %and.i, <8 x i64> %and.i, i8 %mask)
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%conv = zext i8 %test.i to i32
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ret i32 %conv
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}
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define i32 @combineTESTM_AND_mask_3(<8 x i64> %a, <8 x i64>* %bptr , i8 %mask) {
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; CHECK-LABEL: combineTESTM_AND_mask_3:
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; CHECK: ## BB#0:
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; CHECK-NEXT: kmovb %esi, %k1
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; CHECK-NEXT: vptestmq (%rdi), %zmm0, %k0 {%k1}
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; CHECK-NEXT: kmovb %k0, %eax
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; CHECK-NEXT: movzbl %al, %eax
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; CHECK-NEXT: retq
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%b = load <8 x i64>, <8 x i64>* %bptr
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%and.i = and <8 x i64> %a, %b
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%test.i = tail call i8 @llvm.x86.avx512.ptestm.q.512(<8 x i64> %and.i, <8 x i64> %and.i, i8 %mask)
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%conv = zext i8 %test.i to i32
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ret i32 %conv
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}
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define i32 @combineTESTM_AND_mask_4(<8 x i64> %a, <8 x i64>* %bptr , i8 %mask) {
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; CHECK-LABEL: combineTESTM_AND_mask_4:
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; CHECK: ## BB#0:
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; CHECK-NEXT: kmovb %esi, %k1
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; CHECK-NEXT: vptestmq (%rdi), %zmm0, %k0 {%k1}
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; CHECK-NEXT: kmovb %k0, %eax
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; CHECK-NEXT: movzbl %al, %eax
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; CHECK-NEXT: retq
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%b = load <8 x i64>, <8 x i64>* %bptr
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%and.i = and <8 x i64> %b, %a
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%test.i = tail call i8 @llvm.x86.avx512.ptestm.q.512(<8 x i64> %and.i, <8 x i64> %and.i, i8 %mask)
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%conv = zext i8 %test.i to i32
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ret i32 %conv
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}
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declare i8 @llvm.x86.avx512.ptestm.q.512(<8 x i64>, <8 x i64>, i8)
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