forked from OSchip/llvm-project
15 lines
601 B
TableGen
15 lines
601 B
TableGen
// RUN: llvm-tblgen -gen-dag-isel -I %p/../../include -I %p/Common %s | FileCheck %s
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include "reg-with-subregs-common.td"
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// CHECK-LABEL: OPC_CheckOpcode, TARGET_VAL(ISD::EXTRACT_SUBVECTOR),
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// CHECK: OPC_CheckChild1Integer, 0,
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// CHECK: OPC_EmitInteger, MVT::i32, sub0_sub1,
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def : Pat<(v2i32 (extract_subvector v32i32:$src, (i32 0))),
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(EXTRACT_SUBREG GPR_1024:$src, sub0_sub1)>;
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// CHECK: OPC_CheckChild1Integer, 15,
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// CHECK: OPC_EmitInteger, MVT::i32, 5|128,1/*133*/,
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def : Pat<(v2i32 (extract_subvector v32i32:$src, (i32 15))),
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(EXTRACT_SUBREG GPR_1024:$src, sub30_sub31)>;
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