forked from OSchip/llvm-project
299 lines
7.3 KiB
LLVM
299 lines
7.3 KiB
LLVM
; RUN: opt < %s -instcombine -S | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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define i32 @foo1(i32* %a) #0 {
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entry:
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%0 = load i32, i32* %a, align 4
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; Check that the alignment has been upgraded and that the assume has not
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; been removed:
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; CHECK-LABEL: @foo1
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; CHECK-DAG: load i32, i32* %a, align 32
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; CHECK-DAG: call void @llvm.assume
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; CHECK: ret i32
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%ptrint = ptrtoint i32* %a to i64
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%maskedptr = and i64 %ptrint, 31
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%maskcond = icmp eq i64 %maskedptr, 0
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tail call void @llvm.assume(i1 %maskcond)
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ret i32 %0
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}
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define i32 @foo2(i32* %a) #0 {
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entry:
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; Same check as in @foo1, but make sure it works if the assume is first too.
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; CHECK-LABEL: @foo2
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; CHECK-DAG: load i32, i32* %a, align 32
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; CHECK-DAG: call void @llvm.assume
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; CHECK: ret i32
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%ptrint = ptrtoint i32* %a to i64
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%maskedptr = and i64 %ptrint, 31
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%maskcond = icmp eq i64 %maskedptr, 0
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tail call void @llvm.assume(i1 %maskcond)
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%0 = load i32, i32* %a, align 4
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ret i32 %0
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}
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declare void @llvm.assume(i1) #1
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define i32 @simple(i32 %a) #1 {
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entry:
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; CHECK-LABEL: @simple
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; CHECK: call void @llvm.assume
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; CHECK: ret i32 4
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%cmp = icmp eq i32 %a, 4
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tail call void @llvm.assume(i1 %cmp)
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ret i32 %a
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}
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define i32 @can1(i1 %a, i1 %b, i1 %c) {
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entry:
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%and1 = and i1 %a, %b
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%and = and i1 %and1, %c
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tail call void @llvm.assume(i1 %and)
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; CHECK-LABEL: @can1
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; CHECK: call void @llvm.assume(i1 %a)
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; CHECK: call void @llvm.assume(i1 %b)
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; CHECK: call void @llvm.assume(i1 %c)
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; CHECK: ret i32
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ret i32 5
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}
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define i32 @can2(i1 %a, i1 %b, i1 %c) {
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entry:
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%v = or i1 %a, %b
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%w = xor i1 %v, 1
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tail call void @llvm.assume(i1 %w)
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; CHECK-LABEL: @can2
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; CHECK: %[[V1:[^ ]+]] = xor i1 %a, true
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; CHECK: call void @llvm.assume(i1 %[[V1]])
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; CHECK: %[[V2:[^ ]+]] = xor i1 %b, true
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; CHECK: call void @llvm.assume(i1 %[[V2]])
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; CHECK: ret i32
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ret i32 5
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}
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define i32 @bar1(i32 %a) #0 {
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entry:
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%and1 = and i32 %a, 3
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; CHECK-LABEL: @bar1
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; CHECK: call void @llvm.assume
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; CHECK: ret i32 1
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%and = and i32 %a, 7
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%cmp = icmp eq i32 %and, 1
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tail call void @llvm.assume(i1 %cmp)
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ret i32 %and1
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}
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define i32 @bar2(i32 %a) #0 {
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entry:
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; CHECK-LABEL: @bar2
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; CHECK: call void @llvm.assume
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; CHECK: ret i32 1
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%and = and i32 %a, 7
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%cmp = icmp eq i32 %and, 1
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tail call void @llvm.assume(i1 %cmp)
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%and1 = and i32 %a, 3
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ret i32 %and1
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}
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define i32 @bar3(i32 %a, i1 %x, i1 %y) #0 {
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entry:
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%and1 = and i32 %a, 3
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; Don't be fooled by other assumes around.
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; CHECK-LABEL: @bar3
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; CHECK: call void @llvm.assume
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; CHECK: ret i32 1
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tail call void @llvm.assume(i1 %x)
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%and = and i32 %a, 7
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%cmp = icmp eq i32 %and, 1
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tail call void @llvm.assume(i1 %cmp)
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tail call void @llvm.assume(i1 %y)
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ret i32 %and1
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}
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define i32 @bar4(i32 %a, i32 %b) {
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entry:
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%and1 = and i32 %b, 3
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; CHECK-LABEL: @bar4
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; CHECK: call void @llvm.assume
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; CHECK: call void @llvm.assume
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; CHECK: ret i32 1
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%and = and i32 %a, 7
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%cmp = icmp eq i32 %and, 1
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tail call void @llvm.assume(i1 %cmp)
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%cmp2 = icmp eq i32 %a, %b
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tail call void @llvm.assume(i1 %cmp2)
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ret i32 %and1
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}
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define i32 @icmp1(i32 %a) #0 {
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; CHECK-LABEL: @icmp1(
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; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A:%.*]], 5
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; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]])
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; CHECK-NEXT: ret i32 1
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;
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%cmp = icmp sgt i32 %a, 5
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tail call void @llvm.assume(i1 %cmp)
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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}
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define i32 @icmp2(i32 %a) #0 {
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; CHECK-LABEL: @icmp2(
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; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A:%.*]], 5
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; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]])
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; CHECK-NEXT: ret i32 0
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;
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%cmp = icmp sgt i32 %a, 5
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tail call void @llvm.assume(i1 %cmp)
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%t0 = zext i1 %cmp to i32
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%lnot.ext = xor i32 %t0, 1
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ret i32 %lnot.ext
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}
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; If the 'not' of a condition is known true, then the condition must be false.
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define i1 @assume_not(i1 %cond) {
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; CHECK-LABEL: @assume_not(
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; CHECK-NEXT: [[NOTCOND:%.*]] = xor i1 [[COND:%.*]], true
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; CHECK-NEXT: call void @llvm.assume(i1 [[NOTCOND]])
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; CHECK-NEXT: ret i1 false
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;
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%notcond = xor i1 %cond, true
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call void @llvm.assume(i1 %notcond)
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ret i1 %cond
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}
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declare void @escape(i32* %a)
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; Canonicalize a nonnull assumption on a load into metadata form.
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define i1 @nonnull1(i32** %a) {
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; CHECK-LABEL: @nonnull1(
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; CHECK-NEXT: [[LOAD:%.*]] = load i32*, i32** %a, align 8, !nonnull !0
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; CHECK-NEXT: tail call void @escape(i32* nonnull [[LOAD]])
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; CHECK-NEXT: ret i1 false
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;
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%load = load i32*, i32** %a
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%cmp = icmp ne i32* %load, null
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tail call void @llvm.assume(i1 %cmp)
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tail call void @escape(i32* %load)
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%rval = icmp eq i32* %load, null
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ret i1 %rval
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}
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; Make sure the above canonicalization applies only
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; to pointer types. Doing otherwise would be illegal.
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define i1 @nonnull2(i32* %a) {
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; CHECK-LABEL: @nonnull2(
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; CHECK-NEXT: [[LOAD:%.*]] = load i32, i32* %a, align 4
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; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[LOAD]], 0
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; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]])
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; CHECK-NEXT: [[RVAL:%.*]] = icmp eq i32 [[LOAD]], 0
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; CHECK-NEXT: ret i1 [[RVAL]]
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;
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%load = load i32, i32* %a
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%cmp = icmp ne i32 %load, 0
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tail call void @llvm.assume(i1 %cmp)
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%rval = icmp eq i32 %load, 0
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ret i1 %rval
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}
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; Make sure the above canonicalization does not trigger
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; if the assume is control dependent on something else
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define i1 @nonnull3(i32** %a, i1 %control) {
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; CHECK-LABEL: @nonnull3(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[LOAD:%.*]] = load i32*, i32** %a, align 8
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; CHECK-NEXT: br i1 %control, label %taken, label %not_taken
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; CHECK: taken:
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; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32* [[LOAD]], null
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; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]])
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; CHECK-NEXT: [[RVAL:%.*]] = icmp eq i32* [[LOAD]], null
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; CHECK-NEXT: ret i1 [[RVAL]]
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; CHECK: not_taken:
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; CHECK-NEXT: ret i1 true
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;
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entry:
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%load = load i32*, i32** %a
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%cmp = icmp ne i32* %load, null
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br i1 %control, label %taken, label %not_taken
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taken:
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tail call void @llvm.assume(i1 %cmp)
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%rval = icmp eq i32* %load, null
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ret i1 %rval
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not_taken:
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ret i1 true
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}
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; Make sure the above canonicalization does not trigger
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; if the path from the load to the assume is potentially
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; interrupted by an exception being thrown
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define i1 @nonnull4(i32** %a) {
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; CHECK-LABEL: @nonnull4(
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; CHECK-NEXT: [[LOAD:%.*]] = load i32*, i32** %a, align 8
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; CHECK-NEXT: tail call void @escape(i32* [[LOAD]])
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; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32* [[LOAD]], null
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; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]])
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; CHECK-NEXT: [[RVAL:%.*]] = icmp eq i32* [[LOAD]], null
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; CHECK-NEXT: ret i1 [[RVAL]]
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;
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%load = load i32*, i32** %a
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;; This call may throw!
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tail call void @escape(i32* %load)
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%cmp = icmp ne i32* %load, null
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tail call void @llvm.assume(i1 %cmp)
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%rval = icmp eq i32* %load, null
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ret i1 %rval
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}
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; PR35846 - https://bugs.llvm.org/show_bug.cgi?id=35846
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define i32 @assumption_conflicts_with_known_bits(i32 %a, i32 %b) {
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; CHECK-LABEL: @assumption_conflicts_with_known_bits(
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; CHECK-NEXT: tail call void @llvm.assume(i1 false)
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; CHECK-NEXT: ret i32 0
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;
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%and1 = and i32 %b, 3
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%B1 = lshr i32 %and1, %and1
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%B3 = shl nuw nsw i32 %and1, %B1
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%cmp = icmp eq i32 %B3, 1
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tail call void @llvm.assume(i1 %cmp)
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%cmp2 = icmp eq i32 %B1, %B3
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tail call void @llvm.assume(i1 %cmp2)
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ret i32 %and1
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}
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attributes #0 = { nounwind uwtable }
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attributes #1 = { nounwind }
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