forked from OSchip/llvm-project
6d3eecc843
Summary: * Similiar to the ARM backend yse the peephole optimizer to generate more conditional ALU operations; * Add predicated type with default always true to RR instructions in LanaiInstrInfo.td; * Move LanaiSetflagAluCombiner into optimizeCompare; * The ASM parser can currently only handle explicitly specified CC, so specify ".t" (true) where needed in the ASM test; * Remove unused MachineOperand flags; Reviewers: eliben Subscribers: aemerson Differential Revision: http://reviews.llvm.org/D22072 llvm-svn: 274807 |
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| .. | ||
| CMakeLists.txt | ||
| LLVMBuild.txt | ||
| LanaiAsmBackend.cpp | ||
| LanaiBaseInfo.h | ||
| LanaiELFObjectWriter.cpp | ||
| LanaiFixupKinds.h | ||
| LanaiMCAsmInfo.cpp | ||
| LanaiMCAsmInfo.h | ||
| LanaiMCCodeEmitter.cpp | ||
| LanaiMCExpr.cpp | ||
| LanaiMCExpr.h | ||
| LanaiMCTargetDesc.cpp | ||
| LanaiMCTargetDesc.h | ||