Go to file
Chris Lattner 9590870a0d Make the 2-address instruction lowering pass smarter in two ways:
1. If we are two-addressing a commutable instruction and the LHS is not the
   last use of the variable, see if the instruction is the last use of the
   RHS.  If so, commute the instruction, allowing us to avoid a
   register-register copy in many cases for common instructions like ADD, OR,
   AND, etc on X86.
2. If #1 doesn't hold, and if this is an instruction that also existing in
   3-address form, promote the instruction to a 3-address instruction to
   avoid the register-register copy.  We can do this for several common
   instructions in X86, including ADDrr, INC, DEC, etc.

This patch implements test/Regression/CodeGen/X86/commute-two-addr.ll,
overlap-add.ll, and overlap-shift.ll when I check in the X86 support for it.

llvm-svn: 19245
2005-01-02 02:34:12 +00:00
llvm Make the 2-address instruction lowering pass smarter in two ways: 2005-01-02 02:34:12 +00:00