| .. |
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AsmParser
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[cmake] Explicitly mark libraries defined in lib/ as "Component Libraries"
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2019-11-21 10:48:08 -08:00 |
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Disassembler
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[AMDGPU][MC] Remove duplicate code introduced in r359316.
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2019-12-04 11:44:12 +00:00 |
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MCTargetDesc
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[cmake] Explicitly mark libraries defined in lib/ as "Component Libraries"
|
2019-11-21 10:48:08 -08:00 |
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TargetInfo
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[cmake] Explicitly mark libraries defined in lib/ as "Component Libraries"
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2019-11-21 10:48:08 -08:00 |
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Utils
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[IR] Split out target specific intrinsic enums into separate headers
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2019-12-11 18:02:14 -08:00 |
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AMDGPU.h
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[IR] Split out target specific intrinsic enums into separate headers
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2019-12-11 18:02:14 -08:00 |
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AMDGPU.td
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[AMDGPU] w/a for gfx908 mfma SrcC literal HW bug
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2019-08-23 22:09:58 +00:00 |
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AMDGPUAliasAnalysis.cpp
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AMDGPU: Improve alias analysis for GDS
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2019-07-17 11:22:19 +00:00 |
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AMDGPUAliasAnalysis.h
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…
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|
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AMDGPUAlwaysInlinePass.cpp
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AMDGPU: Simplify getAddressSpace calls
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2019-10-31 07:51:38 -07:00 |
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AMDGPUAnnotateKernelFeatures.cpp
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Use llvm::StringLiteral instead of StringRef in few places
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2019-09-20 14:31:42 +00:00 |
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AMDGPUAnnotateUniformValues.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
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AMDGPUArgumentUsageInfo.cpp
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[AMDGPU] Packed thread ids in function call ABI
|
2019-06-28 01:52:13 +00:00 |
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AMDGPUArgumentUsageInfo.h
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AMDGPU: Fix Register copypaste error
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2019-09-05 23:07:10 +00:00 |
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AMDGPUAsmPrinter.cpp
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AMDGPU: Refactor treatment of denormal mode
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2019-11-19 19:55:43 +05:30 |
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AMDGPUAsmPrinter.h
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[AMDGPU] separate accounting for agprs
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2019-10-02 00:26:58 +00:00 |
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AMDGPUAtomicOptimizer.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
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AMDGPUCallLowering.cpp
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[AMDGPU] Don't create MachinePointerInfos with an UndefValue pointer
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2019-12-23 15:58:19 +00:00 |
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AMDGPUCallLowering.h
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AMDGPU/GlobalISel: Rename MIRBuilder to B. NFC
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2019-09-09 23:06:13 +00:00 |
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AMDGPUCallingConv.td
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[AMDGPU] Adjust number of SGPRs available in Calling Convention
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2019-08-28 15:00:45 +00:00 |
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AMDGPUCodeGenPrepare.cpp
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AMDGPU: Refactor treatment of denormal mode
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2019-11-19 19:55:43 +05:30 |
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AMDGPUFeatures.td
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…
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|
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AMDGPUFixFunctionBitcasts.cpp
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…
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AMDGPUFrameLowering.cpp
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Use Align for TFL::TransientStackAlignment
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2019-10-21 08:31:25 +00:00 |
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AMDGPUFrameLowering.h
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Use Align for TFL::TransientStackAlignment
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2019-10-21 08:31:25 +00:00 |
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AMDGPUGISel.td
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AMDGPU/GlobalISel: Handle flat/global G_ATOMIC_CMPXCHG
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2019-10-25 13:11:09 -07:00 |
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AMDGPUGenRegisterBankInfo.def
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AMDGPU/GlobalISel: Add AGPR bank and RegBankSelect mfma intrinsics
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2019-12-01 22:15:48 -08:00 |
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AMDGPUHSAMetadataStreamer.cpp
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[AMDGPU] add support for hostcall buffer pointer as hidden kernel argument
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2019-11-20 15:53:55 +05:30 |
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AMDGPUHSAMetadataStreamer.h
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[llvm] Migrate llvm::make_unique to std::make_unique
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2019-08-15 15:54:37 +00:00 |
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AMDGPUISelDAGToDAG.cpp
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AMDGPU: Refactor treatment of denormal mode
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2019-11-19 19:55:43 +05:30 |
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AMDGPUISelLowering.cpp
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AMDGPU: Improve llvm.round.f64 lowering for CI+
|
2019-12-30 09:55:46 -05:00 |
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AMDGPUISelLowering.h
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AMDGPU: Improve llvm.round.f64 lowering for CI+
|
2019-12-30 09:55:46 -05:00 |
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AMDGPUInline.cpp
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[AMDGPU] Tune inlining parameters for AMDGPU target (part 2)
|
2019-11-19 16:33:16 +03:00 |
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AMDGPUInstrInfo.cpp
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…
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|
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AMDGPUInstrInfo.h
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…
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|
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AMDGPUInstrInfo.td
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AMDGPU/GlobalISel: Select llvm.amdgcn.fmad.ftz
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2019-12-30 11:12:35 -05:00 |
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AMDGPUInstructionSelector.cpp
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AMDGPU/GlobalISel: Re-use MRI available in selector
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2019-12-30 13:00:17 -05:00 |
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AMDGPUInstructionSelector.h
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GlobalISel: Lower s1 source G_SITOFP/G_UITOFP
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2019-11-15 13:37:20 +05:30 |
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AMDGPUInstructions.td
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AMDGPU: Refactor treatment of denormal mode
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2019-11-19 19:55:43 +05:30 |
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AMDGPULegalizerInfo.cpp
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GlobalISel: moreElementsVector for FP min/max
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2019-12-30 10:39:53 -05:00 |
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AMDGPULegalizerInfo.h
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AMDGPU/GlobalISel: Legalize FDIV64
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2019-11-19 21:02:27 -08:00 |
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AMDGPULibCalls.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
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AMDGPULibFunc.cpp
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[AMDGPU] Downgrade from StringLiteral to const char* in an attempt to make GCC 5 happy
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2019-08-25 12:47:31 +00:00 |
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AMDGPULibFunc.h
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…
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|
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AMDGPULowerIntrinsics.cpp
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…
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|
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AMDGPULowerKernelArguments.cpp
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[Alignment] Migrate Attribute::getWith(Stack)Alignment
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2019-10-15 12:56:24 +00:00 |
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AMDGPULowerKernelAttributes.cpp
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…
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|
|
AMDGPUMCInstLower.cpp
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[AMDGPU] link dpp pseudos and real instructions on gfx10
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2019-10-11 22:03:36 +00:00 |
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AMDGPUMachineCFGStructurizer.cpp
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[AMDGPU] Fixes -Wrange-loop-analysis warnings
|
2019-12-22 19:39:28 +01:00 |
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AMDGPUMachineFunction.cpp
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AMDGPU: Refactor treatment of denormal mode
|
2019-11-19 19:55:43 +05:30 |
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AMDGPUMachineFunction.h
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AMDGPU: Refactor treatment of denormal mode
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2019-11-19 19:55:43 +05:30 |
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AMDGPUMachineModuleInfo.cpp
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…
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|
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AMDGPUMachineModuleInfo.h
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…
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|
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AMDGPUMacroFusion.cpp
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…
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|
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AMDGPUMacroFusion.h
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…
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|
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AMDGPUOpenCLEnqueuedBlockLowering.cpp
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Fix parameter name comments using clang-tidy. NFC.
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2019-07-16 04:46:31 +00:00 |
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AMDGPUPTNote.h
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…
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AMDGPUPerfHintAnalysis.cpp
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AMDGPU: Fix assert in clang test
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2019-07-05 21:09:53 +00:00 |
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AMDGPUPerfHintAnalysis.h
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AMDGPU: Make AMDGPUPerfHintAnalysis an SCC pass
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2019-07-05 20:26:13 +00:00 |
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AMDGPUPrintfRuntimeBinding.cpp
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[AMDGPU] add support for hostcall buffer pointer as hidden kernel argument
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2019-11-20 15:53:55 +05:30 |
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AMDGPUPromoteAlloca.cpp
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Resubmit "[Alignment][NFC] Deprecate CreateMemCpy/CreateMemMove"
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2019-12-17 10:07:46 +01:00 |
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AMDGPUPropagateAttributes.cpp
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AMDGPU: Move DEBUG_TYPE definition below includes
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2019-07-08 18:48:39 +00:00 |
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AMDGPURegisterBankInfo.cpp
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AMDGPU/GlobalISel: Account for G_PHI result bank
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2019-12-30 09:55:21 -05:00 |
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AMDGPURegisterBankInfo.h
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AMDGPU/GlobalISel: Add AGPR bank and RegBankSelect mfma intrinsics
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2019-12-01 22:15:48 -08:00 |
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AMDGPURegisterBanks.td
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AMDGPU/GlobalISel: Add AGPR bank and RegBankSelect mfma intrinsics
|
2019-12-01 22:15:48 -08:00 |
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AMDGPURegisterInfo.cpp
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AMDGPU/GlobalISel: Handle more G_INSERT cases
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2019-10-07 19:16:26 +00:00 |
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AMDGPURegisterInfo.h
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AMDGPU/GlobalISel: Handle more G_INSERT cases
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2019-10-07 19:16:26 +00:00 |
|
AMDGPURegisterInfo.td
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[AMDGPU] gfx908 register file changes
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2019-07-09 19:41:51 +00:00 |
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AMDGPURewriteOutArguments.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
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AMDGPUSearchableTables.td
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[AMDGPU][SILoadStoreOptimizer] Merge TBUFFER loads/stores
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2019-11-20 22:59:30 +01:00 |
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AMDGPUSubtarget.cpp
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AMDGPU: Switch backend default max workgroup size to 1024
|
2019-11-13 07:11:02 +05:30 |
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AMDGPUSubtarget.h
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AMDGPU: Refactor treatment of denormal mode
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2019-11-19 19:55:43 +05:30 |
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AMDGPUTargetMachine.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
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AMDGPUTargetMachine.h
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…
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|
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AMDGPUTargetObjectFile.cpp
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…
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|
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AMDGPUTargetObjectFile.h
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…
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|
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AMDGPUTargetTransformInfo.cpp
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[AMDGPU] Implemented fma cost analysis
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2019-12-18 23:54:20 -08:00 |
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AMDGPUTargetTransformInfo.h
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[AMDGPU] Implemented fma cost analysis
|
2019-12-18 23:54:20 -08:00 |
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AMDGPUUnifyDivergentExitNodes.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
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AMDGPUUnifyMetadata.cpp
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[AMDGPU] Fixes -Wrange-loop-analysis warnings
|
2019-12-22 19:39:28 +01:00 |
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AMDILCFGStructurizer.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
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AMDKernelCodeT.h
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…
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BUFInstructions.td
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[AMDGPU] drop getIsFP td helper
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2019-10-17 21:46:56 +00:00 |
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CMakeLists.txt
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[AMDGPU] Printf runtime binding pass
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2019-08-12 17:12:29 +00:00 |
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CaymanInstructions.td
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…
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DSInstructions.td
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[AMDGPU] Add missing flags to DS_Real
|
2019-11-05 14:24:48 -08:00 |
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EvergreenInstructions.td
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AMDGPU: Start redefining atomic PatFrags
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2019-08-01 03:25:52 +00:00 |
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FLATInstructions.td
|
AMDGPU/GlobalISel: Select some 128-bit load/stores
|
2019-12-27 08:49:43 -05:00 |
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GCNDPPCombine.cpp
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[AMDGPU][DPP] Corrected DPP combiner
|
2019-11-20 15:56:45 +03:00 |
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GCNHazardRecognizer.cpp
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Make more use of MachineInstr::mayLoadOrStore.
|
2019-12-19 11:51:52 +00:00 |
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GCNHazardRecognizer.h
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[AMDGPU] gfx908 hazard recognizer
|
2019-07-11 21:30:34 +00:00 |
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GCNILPSched.cpp
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Prune a LegacyDivergenceAnalysis and MachineLoopInfo include each
|
2019-10-19 01:31:09 +00:00 |
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GCNIterativeScheduler.cpp
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[llvm] Migrate llvm::make_unique to std::make_unique
|
2019-08-15 15:54:37 +00:00 |
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GCNIterativeScheduler.h
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…
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|
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GCNMinRegStrategy.cpp
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…
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GCNNSAReassign.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
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GCNProcessors.td
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[AMDGPU] gfx908 target
|
2019-07-09 18:10:06 +00:00 |
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GCNRegBankReassign.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
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GCNRegPressure.cpp
|
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
|
2019-08-15 19:22:08 +00:00 |
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GCNRegPressure.h
|
Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Register as started by r367614. NFC
|
2019-08-01 23:27:28 +00:00 |
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GCNSchedStrategy.cpp
|
[AMDGPU] Add VerifyScheduling support.
|
2019-10-01 15:45:47 +00:00 |
|
GCNSchedStrategy.h
|
AMDGPU: Avoid constructing new std::vector in initCandidate
|
2019-09-05 22:44:06 +00:00 |
|
LLVMBuild.txt
|
…
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|
|
MIMGInstructions.td
|
[AMDGPU] deduplicate tablegen predicates
|
2019-11-04 12:19:17 -08:00 |
|
R600.td
|
…
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|
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R600AsmPrinter.cpp
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[Alignment][NFC] Remove unneeded llvm:: scoping on Align types
|
2019-09-27 12:54:21 +00:00 |
|
R600AsmPrinter.h
|
…
|
|
|
R600ClauseMergePass.cpp
|
…
|
|
|
R600ControlFlowFinalizer.cpp
|
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
|
2019-08-15 19:22:08 +00:00 |
|
R600Defines.h
|
…
|
|
|
R600EmitClauseMarkers.cpp
|
…
|
|
|
R600ExpandSpecialInstrs.cpp
|
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
|
2019-08-15 19:22:08 +00:00 |
|
R600FrameLowering.cpp
|
…
|
|
|
R600FrameLowering.h
|
Use Align for TFL::TransientStackAlignment
|
2019-10-21 08:31:25 +00:00 |
|
R600ISelLowering.cpp
|
[AMDGPU] Don't create MachinePointerInfos with an UndefValue pointer
|
2019-12-23 15:58:19 +00:00 |
|
R600ISelLowering.h
|
…
|
|
|
R600InstrFormats.td
|
…
|
|
|
R600InstrInfo.cpp
|
Use MCRegister in copyPhysReg
|
2019-11-11 14:42:33 +05:30 |
|
R600InstrInfo.h
|
Use MCRegister in copyPhysReg
|
2019-11-11 14:42:33 +05:30 |
|
R600Instructions.td
|
AMDGPU: Redefine load PatFrags
|
2019-07-16 17:38:50 +00:00 |
|
R600MachineFunctionInfo.cpp
|
…
|
|
|
R600MachineFunctionInfo.h
|
…
|
|
|
R600MachineScheduler.cpp
|
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
|
2019-08-15 19:22:08 +00:00 |
|
R600MachineScheduler.h
|
…
|
|
|
R600OpenCLImageTypeLoweringPass.cpp
|
…
|
|
|
R600OptimizeVectorRegisters.cpp
|
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
|
2019-08-15 19:22:08 +00:00 |
|
R600Packetizer.cpp
|
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
|
2019-08-15 19:22:08 +00:00 |
|
R600Processors.td
|
…
|
|
|
R600RegisterInfo.cpp
|
Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Register as started by r367614. NFC
|
2019-08-01 23:27:28 +00:00 |
|
R600RegisterInfo.h
|
CodeGen: Introduce a class for registers
|
2019-06-24 15:50:29 +00:00 |
|
R600RegisterInfo.td
|
…
|
|
|
R600Schedule.td
|
…
|
|
|
R700Instructions.td
|
…
|
|
|
SIAddIMGInit.cpp
|
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
|
2019-08-15 19:22:08 +00:00 |
|
SIAnnotateControlFlow.cpp
|
Sink all InitializePasses.h includes
|
2019-11-13 16:34:37 -08:00 |
|
SIDefines.h
|
[AMDGPU] Added MI bit IsDOT
|
2019-09-17 17:56:13 +00:00 |
|
SIFixSGPRCopies.cpp
|
Sink all InitializePasses.h includes
|
2019-11-13 16:34:37 -08:00 |
|
SIFixVGPRCopies.cpp
|
…
|
|
|
SIFixupVectorISel.cpp
|
Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Register as started by r367614. NFC
|
2019-08-01 23:27:28 +00:00 |
|
SIFoldOperands.cpp
|
AMDGPU: Avoid folding 2 constant operands into an SALU operation
|
2019-12-04 10:25:34 +00:00 |
|
SIFormMemoryClauses.cpp
|
Sink all InitializePasses.h includes
|
2019-11-13 16:34:37 -08:00 |
|
SIFrameLowering.cpp
|
[AMDGPU] Don't create MachinePointerInfos with an UndefValue pointer
|
2019-12-23 15:58:19 +00:00 |
|
SIFrameLowering.h
|
Use Align for TFL::TransientStackAlignment
|
2019-10-21 08:31:25 +00:00 |
|
SIISelLowering.cpp
|
[AMDGPU] Don't create MachinePointerInfos with an UndefValue pointer
|
2019-12-23 15:58:19 +00:00 |
|
SIISelLowering.h
|
AMDGPU: Refactor treatment of denormal mode
|
2019-11-19 19:55:43 +05:30 |
|
SIInsertSkips.cpp
|
…
|
|
|
SIInsertWaitcnts.cpp
|
Make more use of MachineInstr::mayLoadOrStore.
|
2019-12-19 11:51:52 +00:00 |
|
SIInstrFormats.td
|
[AMDGPU] Added MI bit IsDOT
|
2019-09-17 17:56:13 +00:00 |
|
SIInstrInfo.cpp
|
TII: Fix using Register for a subregister index argument
|
2019-12-27 16:53:29 -05:00 |
|
SIInstrInfo.h
|
TII: Fix using Register for a subregister index argument
|
2019-12-27 16:53:29 -05:00 |
|
SIInstrInfo.td
|
AMDGPU: Select global atomicrmw fadd
|
2019-11-06 16:06:38 -08:00 |
|
SIInstructions.td
|
AMDGPU/GlobalISel: Select llvm.amdgcn.fmad.ftz
|
2019-12-30 11:12:35 -05:00 |
|
SILoadStoreOptimizer.cpp
|
AMDGPU/SILoadStoreOptimillzer: Refactor CombineInfo struct
|
2019-12-17 13:43:10 -08:00 |
|
SILowerControlFlow.cpp
|
[AMDGPU] Fix emitIfBreak CF lowering: use temp reg to make register coalescer life easier.
|
2019-11-26 18:59:37 +03:00 |
|
SILowerI1Copies.cpp
|
Sink all InitializePasses.h includes
|
2019-11-13 16:34:37 -08:00 |
|
SILowerSGPRSpills.cpp
|
Sink all InitializePasses.h includes
|
2019-11-13 16:34:37 -08:00 |
|
SIMachineFunctionInfo.cpp
|
AMDGPU: Refactor treatment of denormal mode
|
2019-11-19 19:55:43 +05:30 |
|
SIMachineFunctionInfo.h
|
AMDGPU: Refactor treatment of denormal mode
|
2019-11-19 19:55:43 +05:30 |
|
SIMachineScheduler.cpp
|
AMDGPU/SI: make ~SIScheduleBlockCreator trivial
|
2019-11-11 21:51:59 -08:00 |
|
SIMachineScheduler.h
|
AMDGPU/SI: make ~SIScheduleBlockCreator trivial
|
2019-11-11 21:51:59 -08:00 |
|
SIMemoryLegalizer.cpp
|
[llvm] Migrate llvm::make_unique to std::make_unique
|
2019-08-15 15:54:37 +00:00 |
|
SIModeRegister.cpp
|
[llvm] Migrate llvm::make_unique to std::make_unique
|
2019-08-15 15:54:37 +00:00 |
|
SIOptimizeExecMasking.cpp
|
AMDGPU: Use Register
|
2019-12-27 16:53:21 -05:00 |
|
SIOptimizeExecMaskingPreRA.cpp
|
Sink all InitializePasses.h includes
|
2019-11-13 16:34:37 -08:00 |
|
SIPeepholeSDWA.cpp
|
AMDGPU: Fixed indeterminate map iteration in SIPeepholeSDWA
|
2019-12-02 12:08:49 +00:00 |
|
SIPreAllocateWWMRegs.cpp
|
Sink all InitializePasses.h includes
|
2019-11-13 16:34:37 -08:00 |
|
SIProgramInfo.h
|
[AMDGPU] separate accounting for agprs
|
2019-10-02 00:26:58 +00:00 |
|
SIRegisterInfo.cpp
|
Fix broken comment phrasing and indentation
|
2019-12-02 12:23:20 +05:30 |
|
SIRegisterInfo.h
|
AMDGPU/GlobalISel: Add AGPR bank and RegBankSelect mfma intrinsics
|
2019-12-01 22:15:48 -08:00 |
|
SIRegisterInfo.td
|
AMDGPU: Make VReg_1 only include 1 artificial register
|
2019-10-28 20:51:51 -07:00 |
|
SISchedule.td
|
[AMDGPU] gfx908 scheduling
|
2019-07-11 21:25:00 +00:00 |
|
SIShrinkInstructions.cpp
|
AMDGPU: Don't fold S_NOPs with implicit operands
|
2019-10-30 14:40:56 -07:00 |
|
SIWholeQuadMode.cpp
|
Sink all InitializePasses.h includes
|
2019-11-13 16:34:37 -08:00 |
|
SMInstructions.td
|
[AMDGPU] deduplicate tablegen predicates
|
2019-11-04 12:19:17 -08:00 |
|
SOPInstructions.td
|
[AMDGPU] deduplicate tablegen predicates
|
2019-11-04 12:19:17 -08:00 |
|
VIInstrFormats.td
|
…
|
|
|
VIInstructions.td
|
…
|
|
|
VOP1Instructions.td
|
[AMDGPU][MC][GFX10] Enabled v_movrel*[sdwa|dpp|dpp8] opcodes
|
2019-11-18 17:23:40 +03:00 |
|
VOP2Instructions.td
|
[AMDGPU] deduplicate tablegen predicates
|
2019-11-04 12:19:17 -08:00 |
|
VOP3Instructions.td
|
[AMDGPU] deduplicate tablegen predicates
|
2019-11-04 12:19:17 -08:00 |
|
VOP3PInstructions.td
|
[AMDGPU] deduplicate tablegen predicates
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2019-11-04 12:19:17 -08:00 |
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VOPCInstructions.td
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[AMDGPU] deduplicate tablegen predicates
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2019-11-04 12:19:17 -08:00 |
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VOPInstructions.td
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[AMDGPU] copy OtherPredicates from pseudo to VOP3_Real
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2019-09-26 21:06:17 +00:00 |
48e0e68edb