forked from OSchip/llvm-project
97 lines
4.0 KiB
LLVM
97 lines
4.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s
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define void @foo(<3 x float> %in, <4 x i8>* nocapture %out) nounwind {
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; CHECK-LABEL: foo:
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; CHECK: # BB#0:
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; CHECK-NEXT: cvttps2dq %xmm0, %xmm0
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; CHECK-NEXT: movl $255, %eax
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; CHECK-NEXT: pinsrd $3, %eax, %xmm0
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; CHECK-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u]
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; CHECK-NEXT: movd %xmm0, (%rdi)
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; CHECK-NEXT: retq
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%t0 = fptoui <3 x float> %in to <3 x i8>
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%t1 = shufflevector <3 x i8> %t0, <3 x i8> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
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%t2 = insertelement <4 x i8> %t1, i8 -1, i32 3
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store <4 x i8> %t2, <4 x i8>* %out, align 4
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ret void
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}
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; Verify that the DAGCombiner doesn't wrongly fold a build_vector into a
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; blend with a zero vector if the build_vector contains negative zero.
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define <4 x float> @test_negative_zero_1(<4 x float> %A) {
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; CHECK-LABEL: test_negative_zero_1:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[2],zero
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; CHECK-NEXT: retq
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entry:
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%0 = extractelement <4 x float> %A, i32 0
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%1 = insertelement <4 x float> undef, float %0, i32 0
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%2 = insertelement <4 x float> %1, float -0.0, i32 1
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%3 = extractelement <4 x float> %A, i32 2
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%4 = insertelement <4 x float> %2, float %3, i32 2
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%5 = insertelement <4 x float> %4, float 0.0, i32 3
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ret <4 x float> %5
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}
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define <2 x double> @test_negative_zero_2(<2 x double> %A) {
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; CHECK-LABEL: test_negative_zero_2:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: movhpd {{.*#+}} xmm0 = xmm0[0],mem[0]
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; CHECK-NEXT: retq
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entry:
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%0 = extractelement <2 x double> %A, i32 0
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%1 = insertelement <2 x double> undef, double %0, i32 0
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%2 = insertelement <2 x double> %1, double -0.0, i32 1
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ret <2 x double> %2
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}
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define <4 x float> @test_buildvector_v4f32_register(float %f0, float %f1, float %f2, float %f3) {
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; CHECK-LABEL: test_buildvector_v4f32_register:
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; CHECK: # BB#0:
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; CHECK-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3]
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; CHECK-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1],xmm2[0],xmm0[3]
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; CHECK-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm3[0]
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; CHECK-NEXT: retq
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%ins0 = insertelement <4 x float> undef, float %f0, i32 0
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%ins1 = insertelement <4 x float> %ins0, float %f1, i32 1
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%ins2 = insertelement <4 x float> %ins1, float %f2, i32 2
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%ins3 = insertelement <4 x float> %ins2, float %f3, i32 3
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ret <4 x float> %ins3
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}
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define <4 x float> @test_buildvector_v4f32_load(float* %p0, float* %p1, float* %p2, float* %p3) {
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; CHECK-LABEL: test_buildvector_v4f32_load:
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; CHECK: # BB#0:
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; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; CHECK-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[2,3]
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; CHECK-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1],mem[0],xmm0[3]
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; CHECK-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0]
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; CHECK-NEXT: retq
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%f0 = load float, float* %p0, align 4
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%f1 = load float, float* %p1, align 4
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%f2 = load float, float* %p2, align 4
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%f3 = load float, float* %p3, align 4
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%ins0 = insertelement <4 x float> undef, float %f0, i32 0
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%ins1 = insertelement <4 x float> %ins0, float %f1, i32 1
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%ins2 = insertelement <4 x float> %ins1, float %f2, i32 2
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%ins3 = insertelement <4 x float> %ins2, float %f3, i32 3
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ret <4 x float> %ins3
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}
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define <4 x float> @test_buildvector_v4f32_partial_load(float %f0, float %f1, float %f2, float* %p3) {
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; CHECK-LABEL: test_buildvector_v4f32_partial_load:
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; CHECK: # BB#0:
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; CHECK-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3]
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; CHECK-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1],xmm2[0],xmm0[3]
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; CHECK-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0]
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; CHECK-NEXT: retq
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%f3 = load float, float* %p3, align 4
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%ins0 = insertelement <4 x float> undef, float %f0, i32 0
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%ins1 = insertelement <4 x float> %ins0, float %f1, i32 1
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%ins2 = insertelement <4 x float> %ins1, float %f2, i32 2
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%ins3 = insertelement <4 x float> %ins2, float %f3, i32 3
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ret <4 x float> %ins3
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}
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