llvm-project/llvm/test/CodeGen
Bjorn Pettersson 7ded6a909b [CodeGen] Set FrameSetup/FrameDestroy on BUNDLE instructions
Summary:
If any of the bundled instructions are marked as FrameSetup
or FrameDestroy, then that property is set on the BUNDLE
instruction as well.

As long as the scheduler/packetizer aren't mixing
prologue/epilogue instructions (i.e. all the bundled
instructions have the same property) then this simply gives
the bundle the correct property (so when using a bundle
iterator in late passes a bundle will be correctly identified
as FrameSetup/FrameDestroy).

When for example bundling a mix of FrameSetup instructions
with non-FrameSetup instructions it could be discussed if
the bundle should have the property or not. The choice here
has been to set these properties on the BUNDLE instruction if
any of the bundled instructions have the property set.

Reviewers: #debug-info, kparzysz

Reviewed By: kparzysz

Subscribers: vsk, thegameg, llvm-commits

Differential Revision: https://reviews.llvm.org/D50637

llvm-svn: 340680
2018-08-25 11:26:17 +00:00
..
AArch64 [AArch64] Reject inline asm with FP registers when FP is disabled. 2018-08-24 19:12:13 +00:00
AMDGPU DAG: Allow matching fminnum/fmaxnum from vselect 2018-08-24 21:24:18 +00:00
ARC
ARM [ARM] Lower llvm.ctlz.i32 to a libcall when clz is not available. 2018-08-22 21:47:14 +00:00
AVR
BPF bpf: add missing RegState to notify MachineInstr verifier necessary register usage 2018-07-27 16:58:52 +00:00
Generic [DWARF] Unclamp line table version on Darwin for v5 and later. 2018-08-08 21:16:50 +00:00
Hexagon [CodeGen] Set FrameSetup/FrameDestroy on BUNDLE instructions 2018-08-25 11:26:17 +00:00
Inputs
Lanai
MIR Consistently use MemoryLocation::UnknownSize to indicate unknown access size 2018-08-20 20:37:57 +00:00
MSP430
Mips [DAGCombiner][Mips] Don't combine bitcast+store after LegalOperations when the store is volatile, if the resulting store isn't Legal 2018-08-24 17:48:25 +00:00
NVPTX [NVPTX] Remove ftz variants of cvt with rounding mode 2018-08-21 18:44:25 +00:00
Nios2
PowerPC [PowerPC] Emit xscpsgndp instead of xxlor when copying floating point scalar registers for P9 2018-08-24 20:00:24 +00:00
RISCV [SelectionDAG] Improve the legalisation lowering of UMULO. 2018-08-16 18:39:39 +00:00
SPARC [Sparc] Get sret arg size from CallLoweringInfo.getArgs() 2018-08-17 10:40:00 +00:00
SystemZ [RegisterCoalscer] Manually remove leftover segments when commuting def 2018-08-21 19:01:26 +00:00
Thumb [SelectionDAG] Improve the legalisation lowering of UMULO. 2018-08-16 18:39:39 +00:00
Thumb2 [SelectionDAG] Improve the legalisation lowering of UMULO. 2018-08-16 18:39:39 +00:00
WebAssembly [WebAssembly] Prioritize splats over v128.consts 2018-08-23 19:23:13 +00:00
WinCFGuard Rename the cfguard module flag to cfguardtable 2018-08-10 09:48:53 +00:00
WinEH
X86 [LiveDebugVariables] Avoid faulty addDefsFromCopies in computeIntervals 2018-08-25 10:02:03 +00:00
XCore [DAGCombiner] extend(ifpositive(X)) -> shift-right (not X) 2018-07-15 16:27:07 +00:00