llvm-project/llvm/test/CodeGen
Rafael Espindola aa318ae495 Revert 132424 to fix PR10068.
llvm-svn: 132479
2011-06-02 19:57:47 +00:00
..
ARM Allow bitcasts between valid types of the same size and vector 2011-06-01 19:55:10 +00:00
Alpha If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0. 2010-12-06 22:39:26 +00:00
Blackfin Don't completely eliminate identity copies that also modify super register liveness. 2011-03-31 17:55:25 +00:00
CBackend
CPP
CellSPU don't test for codegen of 'store undef' 2011-04-09 02:31:26 +00:00
Generic This patch is another step in the direction of adding vector select. In this 2011-06-01 12:51:46 +00:00
MBlaze Add scheduling information for the MBlaze backend. 2011-04-11 22:31:52 +00:00
MSP430 Fix register-dependent test in MSP430. 2011-05-04 01:01:39 +00:00
Mips Detect FI|cst pattern in MipsDAGToDAGISel::SelectAddr. Patch by Sasa Stankovic. 2011-06-02 01:03:14 +00:00
PTX PTX: add flag to disable mad/fma selection 2011-05-18 15:42:23 +00:00
PowerPC FileCheckize and break dependence on coalescing order. 2011-05-04 19:02:01 +00:00
SPARC Fix more register and coalescing dependencies. 2011-05-04 19:02:11 +00:00
SystemZ Fix SystemZ tests 2011-03-31 23:02:12 +00:00
Thumb Move this test to CodeGen/Thumb. rdar://problem/9416774 2011-05-11 19:41:28 +00:00
Thumb2 Since I can't reproduce the failures from 131261, re-trying with a 2011-05-13 00:51:54 +00:00
X86 Revert 132424 to fix PR10068. 2011-06-02 19:57:47 +00:00
XCore Add XCore intrinsic for crc8. 2011-05-31 16:24:49 +00:00