forked from OSchip/llvm-project
72 lines
1.9 KiB
LLVM
72 lines
1.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu | FileCheck %s
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; This is good - eliminate an op by hoisting logic.
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define i32 @lshr_or(i32 %x, i32 %y, i32 %z, i32* %p1, i32* %p2) {
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; CHECK-LABEL: lshr_or:
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; CHECK: # %bb.0:
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; CHECK-NEXT: or 3, 3, 4
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; CHECK-NEXT: srw 3, 3, 5
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; CHECK-NEXT: blr
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%xt = lshr i32 %x, %z
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%yt = lshr i32 %y, %z
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%r = or i32 %xt, %yt
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ret i32 %r
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}
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; This is questionable - hoisting doesn't eliminate anything.
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; It might result in an extra register move.
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define i32 @lshr_or_multiuse1(i32 %x, i32 %y, i32 %z, i32* %p1, i32* %p2) {
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; CHECK-LABEL: lshr_or_multiuse1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: srw 7, 3, 5
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; CHECK-NEXT: srw 3, 4, 5
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; CHECK-NEXT: or 3, 7, 3
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; CHECK-NEXT: stw 7, 0(6)
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; CHECK-NEXT: blr
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%xt = lshr i32 %x, %z
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%yt = lshr i32 %y, %z
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store i32 %xt, i32* %p1
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%r = or i32 %xt, %yt
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ret i32 %r
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}
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; This is questionable - hoisting doesn't eliminate anything.
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define i32 @lshr_multiuse2(i32 %x, i32 %y, i32 %z, i32* %p1, i32* %p2) {
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; CHECK-LABEL: lshr_multiuse2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: srw 3, 3, 5
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; CHECK-NEXT: srw 4, 4, 5
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; CHECK-NEXT: or 3, 3, 4
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; CHECK-NEXT: stw 4, 0(7)
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; CHECK-NEXT: blr
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%xt = lshr i32 %x, %z
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%yt = lshr i32 %y, %z
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store i32 %yt, i32* %p2
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%r = or i32 %xt, %yt
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ret i32 %r
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}
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; This is not profitable to hoist. We need an extra shift instruction.
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define i32 @lshr_multiuse3(i32 %x, i32 %y, i32 %z, i32* %p1, i32* %p2) {
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; CHECK-LABEL: lshr_multiuse3:
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; CHECK: # %bb.0:
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; CHECK-NEXT: srw 3, 3, 5
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; CHECK-NEXT: srw 4, 4, 5
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; CHECK-NEXT: stw 3, 0(6)
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; CHECK-NEXT: or 3, 3, 4
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; CHECK-NEXT: stw 4, 0(7)
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; CHECK-NEXT: blr
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%xt = lshr i32 %x, %z
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%yt = lshr i32 %y, %z
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store i32 %xt, i32* %p1
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store i32 %yt, i32* %p2
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%r = or i32 %xt, %yt
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ret i32 %r
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}
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