forked from OSchip/llvm-project
114 lines
6.5 KiB
LLVM
114 lines
6.5 KiB
LLVM
; RUN: llc -O3 -mtriple=thumbv8.1m.main-arm-none-eabi -mattr=+mve.fp -verify-machineinstrs %s -o - | FileCheck %s
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; verify-machineinstrs previously caught the incorrect use of QPR in the stack reloads.
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define arm_aapcs_vfpcc void @k() {
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; CHECK-LABEL: k:
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; CHECK: vstrw.32
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; CHECK: vldrw.u32
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entry:
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br label %vector.body
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vector.body: ; preds = %vector.body, %entry
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%vec.ind = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %entry ], [ zeroinitializer, %vector.body ]
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%0 = and <8 x i32> %vec.ind, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
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%1 = icmp eq <8 x i32> %0, zeroinitializer
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%2 = select <8 x i1> %1, <8 x i16> <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>, <8 x i16> <i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6>
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%3 = bitcast i16* undef to <8 x i16>*
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store <8 x i16> %2, <8 x i16>* %3, align 2
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%4 = icmp eq i32 undef, 128
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br i1 %4, label %for.cond4.preheader, label %vector.body
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for.cond4.preheader: ; preds = %vector.body
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br i1 undef, label %vector.body105, label %for.body10
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for.cond4.loopexit: ; preds = %for.body10
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%call5 = call arm_aapcs_vfpcc i32 bitcast (i32 (...)* @l to i32 ()*)()
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br label %vector.body105
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for.body10: ; preds = %for.body10, %for.cond4.preheader
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%exitcond88 = icmp eq i32 undef, 7
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br i1 %exitcond88, label %for.cond4.loopexit, label %for.body10
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vector.body105: ; preds = %vector.body105, %for.cond4.loopexit, %for.cond4.preheader
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%vec.ind113 = phi <8 x i32> [ %vec.ind.next114, %vector.body105 ], [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %for.cond4.loopexit ], [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %for.cond4.preheader ]
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%5 = and <8 x i32> %vec.ind113, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
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%vec.ind.next114 = add <8 x i32> %vec.ind113, <i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8>
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%6 = icmp eq i32 undef, 256
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br i1 %6, label %vector.body115.ph, label %vector.body105
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vector.body115.ph: ; preds = %vector.body105
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tail call void asm sideeffect "nop", "~{s0},~{s4},~{s8},~{s12},~{s16},~{s20},~{s24},~{s28},~{memory}"()
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br label %vector.body115
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vector.body115: ; preds = %vector.body115, %vector.body115.ph
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%vec.ind123 = phi <4 x i32> [ %vec.ind.next124, %vector.body115 ], [ <i32 0, i32 1, i32 2, i32 3>, %vector.body115.ph ]
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%7 = icmp eq <4 x i32> %vec.ind123, zeroinitializer
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%vec.ind.next124 = add <4 x i32> %vec.ind123, <i32 4, i32 4, i32 4, i32 4>
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br label %vector.body115
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}
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@a = external dso_local global i32, align 4
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@b = dso_local local_unnamed_addr global i32 ptrtoint (i32* @a to i32), align 4
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@c = dso_local global i32 2, align 4
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@d = dso_local global i32 2, align 4
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define dso_local i32 @e() #0 {
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; CHECK-LABEL: e:
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; CHECK: vstrw.32
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; CHECK: vldrw.u32
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entry:
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%f = alloca i16, align 2
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%g = alloca [3 x [8 x [4 x i16*]]], align 4
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store i16 4, i16* %f, align 2
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%0 = load i32, i32* @c, align 4
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%1 = load i32, i32* @d, align 4
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%arrayinit.element7 = getelementptr inbounds [3 x [8 x [4 x i16*]]], [3 x [8 x [4 x i16*]]]* %g, i32 0, i32 0, i32 1, i32 1
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%2 = bitcast i16** %arrayinit.element7 to i32*
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store i32 %0, i32* %2, align 4
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%arrayinit.element8 = getelementptr inbounds [3 x [8 x [4 x i16*]]], [3 x [8 x [4 x i16*]]]* %g, i32 0, i32 0, i32 1, i32 2
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store i16* null, i16** %arrayinit.element8, align 4
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%3 = bitcast i16** undef to i32*
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store i32 %1, i32* %3, align 4
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%4 = bitcast i16** undef to i32*
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store i32 %0, i32* %4, align 4
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%arrayinit.element13 = getelementptr inbounds [3 x [8 x [4 x i16*]]], [3 x [8 x [4 x i16*]]]* %g, i32 0, i32 0, i32 2, i32 2
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%5 = bitcast i16** %arrayinit.element13 to <4 x i16*>*
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store <4 x i16*> <i16* inttoptr (i32 4 to i16*), i16* bitcast (i32* @c to i16*), i16* bitcast (i32* @c to i16*), i16* null>, <4 x i16*>* %5, align 4
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%arrayinit.element24 = getelementptr inbounds [3 x [8 x [4 x i16*]]], [3 x [8 x [4 x i16*]]]* %g, i32 0, i32 0, i32 4, i32 2
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%6 = bitcast i16** %arrayinit.element24 to <4 x i16*>*
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store <4 x i16*> <i16* bitcast (i32* @d to i16*), i16* null, i16* bitcast (i32* @d to i16*), i16* bitcast (i32 ()* @e to i16*)>, <4 x i16*>* %6, align 4
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%7 = bitcast i16** undef to <4 x i16*>*
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store <4 x i16*> <i16* inttoptr (i32 4 to i16*), i16* bitcast (i32 ()* @e to i16*), i16* bitcast (i32* @c to i16*), i16* null>, <4 x i16*>* %7, align 4
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%8 = bitcast i16** undef to <4 x i16*>*
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store <4 x i16*> <i16* bitcast (i32* @c to i16*), i16* bitcast (i32 ()* @e to i16*), i16* bitcast (i32* @c to i16*), i16* bitcast (i32* @c to i16*)>, <4 x i16*>* %8, align 4
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%9 = bitcast i16** undef to <4 x i16*>*
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store <4 x i16*> <i16* bitcast (i32 ()* @e to i16*), i16* bitcast (i32* @c to i16*), i16* bitcast (i32* @c to i16*), i16* bitcast (i32* @c to i16*)>, <4 x i16*>* %9, align 4
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%10 = bitcast i16** undef to <4 x i16*>*
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store <4 x i16*> <i16* bitcast (i32* @c to i16*), i16* bitcast (i32* @c to i16*), i16* null, i16* bitcast (i32 ()* @e to i16*)>, <4 x i16*>* %10, align 4
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call void @llvm.memset.p0i8.i32(i8* nonnull align 4 dereferenceable(64) undef, i8 0, i32 64, i1 false)
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%11 = bitcast i16** undef to <4 x i16*>*
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store <4 x i16*> <i16* bitcast (i32* @d to i16*), i16* bitcast (i32 ()* @e to i16*), i16* bitcast (i32* @c to i16*), i16* bitcast (i32* @d to i16*)>, <4 x i16*>* %11, align 4
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%12 = bitcast i16** undef to <4 x i16*>*
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store <4 x i16*> <i16* null, i16* bitcast (i32* @c to i16*), i16* bitcast (i32* @c to i16*), i16* bitcast (i32* @c to i16*)>, <4 x i16*>* %12, align 4
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%13 = bitcast i16** undef to <4 x i16*>*
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store <4 x i16*> <i16* bitcast (i32* @c to i16*), i16* bitcast (i32* @d to i16*), i16* bitcast (i32* @c to i16*), i16* null>, <4 x i16*>* %13, align 4
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%arrayinit.begin78 = getelementptr inbounds [3 x [8 x [4 x i16*]]], [3 x [8 x [4 x i16*]]]* %g, i32 0, i32 2, i32 3, i32 0
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store i16* inttoptr (i32 4 to i16*), i16** %arrayinit.begin78, align 4
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store i32 0, i32* @b, align 4
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br label %for.cond
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for.cond: ; preds = %for.cond, %entry
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br label %for.cond
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}
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; Function Attrs: argmemonly nounwind willreturn
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declare void @llvm.memset.p0i8.i32(i8* nocapture writeonly, i8, i32, i1 immarg) #1
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; Function Attrs: argmemonly nounwind willreturn
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declare void @llvm.memset.p0i8.i64(i8* nocapture writeonly, i8, i64, i1 immarg) #1
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declare arm_aapcs_vfpcc i32 @l(...)
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