forked from OSchip/llvm-project
9b9a308452
Two issues: 1. t2CMPri shouldn't use CPSR if it isn't predicated. This doesn't really have any visible effect at the moment, but it might matter in the future. 2. The t2CMPri generated for t2WhileLoopStart might need to use a register that isn't LR. My team found this because we have a patch to track register liveness late in the pass pipeline. I'll look into upstreaming it to help catch issues like this earlier. Differential Revision: https://reviews.llvm.org/D66243 llvm-svn: 369069 |
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| .. | ||
| branch-targets.ll | ||
| cond-mov.mir | ||
| end-positive-offset.mir | ||
| loop-guards.ll | ||
| massive.mir | ||
| multiblock-massive.mir | ||
| revert-after-call.mir | ||
| revert-after-read.mir | ||
| revert-after-spill.mir | ||
| revert-after-write.mir | ||
| revert-non-header.mir | ||
| revert-non-loop.mir | ||
| revert-while.mir | ||
| size-limit.mir | ||
| switch.mir | ||
| while-negative-offset.mir | ||
| while.mir | ||