forked from OSchip/llvm-project
24 lines
874 B
TableGen
24 lines
874 B
TableGen
//===-- M68kSchedule.td - M68k Scheduling Definitions --*- tablegen -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// This file contains M68k scheduler definitions.
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///
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//===----------------------------------------------------------------------===//
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/// This is a very general M68k Scheduling Model and best suited for the very
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/// first M68000 CPU, other model must override these characteristics
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class M68kSchedModel : SchedMachineModel {
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let LoadLatency = 4; // Word (Rn)
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let HighLatency = 16; // Long ABS
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let PostRAScheduler = 0;
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let CompleteModel = 0;
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}
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def GenericM68kModel : M68kSchedModel;
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