forked from OSchip/llvm-project
127 lines
4.3 KiB
TableGen
127 lines
4.3 KiB
TableGen
//===-- M68k.td - Motorola 680x0 target definitions ------*- tablegen -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// This is a target description file for the Motorola 680x0 family, referred
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/// to here as the "M68k" architecture.
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///
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//===----------------------------------------------------------------------===//
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include "llvm/Target/Target.td"
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//===----------------------------------------------------------------------===//
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// M68k Subtarget features
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//===----------------------------------------------------------------------===//
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def FeatureISA00
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: SubtargetFeature<"isa-68000", "SubtargetKind", "M00",
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"Is M68000 ISA supported">;
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def FeatureISA10
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: SubtargetFeature<"isa-68010", "SubtargetKind", "M10",
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"Is M68010 ISA supported",
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[ FeatureISA00 ]>;
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def FeatureISA20
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: SubtargetFeature<"isa-68020", "SubtargetKind", "M20",
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"Is M68020 ISA supported",
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[ FeatureISA10 ]>;
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def FeatureISA30
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: SubtargetFeature<"isa-68030", "SubtargetKind", "M30",
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"Is M68030 ISA supported",
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[ FeatureISA20 ]>;
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def FeatureISA40
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: SubtargetFeature<"isa-68040", "SubtargetKind", "M40",
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"Is M68040 ISA supported",
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[ FeatureISA30 ]>;
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def FeatureISA60
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: SubtargetFeature<"isa-68060", "SubtargetKind", "M60",
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"Is M68060 ISA supported",
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[ FeatureISA40 ]>;
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foreach i = {0-6} in
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def FeatureReserveA#i :
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SubtargetFeature<"reserve-a"#i, "UserReservedRegister[M68k::A"#i#"]",
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"true", "Reserve A"#i#" register">;
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foreach i = {0-7} in
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def FeatureReserveD#i :
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SubtargetFeature<"reserve-d"#i, "UserReservedRegister[M68k::D"#i#"]",
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"true", "Reserve D"#i#" register">;
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//===----------------------------------------------------------------------===//
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// M68k processors supported.
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//===----------------------------------------------------------------------===//
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include "M68kSchedule.td"
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class Proc<string Name, list<SubtargetFeature> Features>
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: ProcessorModel<Name, GenericM68kModel, Features>;
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def : Proc<"generic", [ FeatureISA00 ]>;
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def : Proc<"M68000", [ FeatureISA00 ]>;
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def : Proc<"M68010", [ FeatureISA10 ]>;
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def : Proc<"M68020", [ FeatureISA20 ]>;
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def : Proc<"M68030", [ FeatureISA30 ]>;
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def : Proc<"M68040", [ FeatureISA40 ]>;
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def : Proc<"M68060", [ FeatureISA60 ]>;
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//===----------------------------------------------------------------------===//
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// Register File Description
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//===----------------------------------------------------------------------===//
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include "M68kRegisterInfo.td"
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//===----------------------------------------------------------------------===//
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// Instruction Descriptions
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//===----------------------------------------------------------------------===//
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include "M68kInstrInfo.td"
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def M68kInstrInfo : InstrInfo;
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//===----------------------------------------------------------------------===//
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// Calling Conventions
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//===----------------------------------------------------------------------===//
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include "M68kCallingConv.td"
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//===---------------------------------------------------------------------===//
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// Assembly Printers
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//===---------------------------------------------------------------------===//
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def M68kAsmWriter : AsmWriter {
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string AsmWriterClassName = "InstPrinter";
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bit isMCAsmWriter = 1;
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}
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//===---------------------------------------------------------------------===//
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// Assembly Parsers
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//===---------------------------------------------------------------------===//
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def M68kAsmParser : AsmParser {
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let ShouldEmitMatchRegisterName = 0;
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let ShouldEmitMatchRegisterAltName = 0;
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}
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def M68kAsmParserVariant : AsmParserVariant {
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int Variant = 0;
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}
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//===----------------------------------------------------------------------===//
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// Target
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//===----------------------------------------------------------------------===//
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def M68k : Target {
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let InstructionSet = M68kInstrInfo;
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let AssemblyParsers = [M68kAsmParser];
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let AssemblyWriters = [M68kAsmWriter];
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}
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