forked from OSchip/llvm-project
68 lines
2.0 KiB
C
68 lines
2.0 KiB
C
// RUN: %clang_cc1 -triple hexagon -target-cpu hexagonv66 -target-feature +hvxv66 -target-feature +hvx-length128b -emit-llvm -o - %s | FileCheck %s
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// REQUIRES: hexagon-registered-target
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typedef long HEXAGON_VecPred128 __attribute__((__vector_size__(128)))
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__attribute__((aligned(128)));
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typedef long HEXAGON_Vect1024 __attribute__((__vector_size__(128)))
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__attribute__((aligned(128)));
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typedef long HEXAGON_Vect2048 __attribute__((__vector_size__(256)))
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__attribute__((aligned(256)));
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// CHECK-LABEL: @test1
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// CHECK: call <32 x i32> @llvm.hexagon.V6.vaddcarrysat.128B(<32 x i32> %{{[0-9]+}}, <32 x i32> %{{[0-9]+}}, <128 x i1> %{{[0-9]+}})
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HEXAGON_Vect1024 test1(void *in, void *out) {
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HEXAGON_Vect1024 v1, v2;
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HEXAGON_Vect1024 *p;
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HEXAGON_VecPred128 q1;
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p = (HEXAGON_Vect1024 *)in;
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v1 = *p++;
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v2 = *p++;
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q1 = *p++;
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return __builtin_HEXAGON_V6_vaddcarrysat_128B(v1, v2, q1);
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}
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// CHECK-LABEL: @test26
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// CHECK: call <32 x i32> @llvm.hexagon.V6.vrotr.128B(<32 x i32> %{{[0-9]+}}, <32 x i32> %{{[0-9]+}})
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HEXAGON_Vect1024 test26(void *in, void *out) {
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HEXAGON_Vect1024 v1, v2;
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HEXAGON_Vect1024 *p;
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p = (HEXAGON_Vect1024 *)in;
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v1 = *p++;
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v2 = *p++;
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return __builtin_HEXAGON_V6_vrotr_128B(v1, v2);
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}
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// CHECK-LABEL: @test27
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// CHECK: call <32 x i32> @llvm.hexagon.V6.vsatdw.128B(<32 x i32> %{{[0-9]+}}, <32 x i32> %{{[0-9]+}})
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HEXAGON_Vect1024 test27(void *in, void *out) {
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HEXAGON_Vect1024 v1, v2;
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HEXAGON_Vect1024 *p;
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p = (HEXAGON_Vect1024 *)in;
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v1 = *p++;
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v2 = *p++;
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return __builtin_HEXAGON_V6_vsatdw_128B(v1, v2);
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}
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// CHECK-LABEL: @test28
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// CHECK: call <64 x i32> @llvm.hexagon.V6.vasr.into.128B(<64 x i32> %{{[0-9]+}}, <32 x i32> %{{[0-9]+}}, <32 x i32> %{{[0-9]+}})
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HEXAGON_Vect2048 test28(void *in1, void *in2, void *out) {
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HEXAGON_Vect1024 v1, v2;
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HEXAGON_Vect1024 *p1;
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HEXAGON_Vect2048 *p2;
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HEXAGON_Vect2048 vr;
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p1 = (HEXAGON_Vect1024 *)in1;
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v1 = *p1++;
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v2 = *p1++;
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p2 = (HEXAGON_Vect2048 *)in2;
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vr = *p2;
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return __builtin_HEXAGON_V6_vasr_into_128B(vr, v1, v2);
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}
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