Daniel Sanders 44657ef6e5 [mips][msa] Change constant used in ori tests to avoid conflict with bseti (also xori to avoid bnegi) ... Upcoming commit(s) are going to add support for bseti and bnegi. This would cause some existing tests to (correctly) change behaviour and emit a different instruction. This patch prevents this by changing the constant used in ori and xori tests so that they will not be matchable by the bseti and bnegi patterns when these instructions are matchable from normal IR. llvm-svn: 194467		2013-11-12 10:14:18 +00:00
..
AArch64	[AArch64] The shift right/left and insert immediate builtins expect 3	2013-11-11 19:11:11 +00:00
ARM	[VirtRegMap] Fix for PR17825. Do not ignore noreturn definitions when setting	2013-11-08 18:14:17 +00:00
CPP	[tests] Cleanup initialization of test suffixes.	2013-08-16 00:37:11 +00:00
Generic	Change objectsize intrinsic to accept different address spaces.	2013-10-07 18:06:48 +00:00
Hexagon	TBAA: remove !tbaa from testing cases when they are not needed.	2013-09-30 18:17:35 +00:00
Inputs	Debug Info: add an identifier field to DICompositeType.	2013-08-26 22:39:55 +00:00
MSP430	Make sure SP is always aligned on a 2 byte boundary	2013-10-24 09:32:31 +00:00
Mips	[mips][msa] Change constant used in ori tests to avoid conflict with bseti (also xori to avoid bnegi)	2013-11-12 10:14:18 +00:00
NVPTX	[NVPTX] Properly handle bitcast ConstantExpr when checking for the alignment of function parameters	2013-11-11 19:28:19 +00:00
PowerPC	Add PPC option for full register names in asm	2013-11-11 14:58:40 +00:00
R600	R600/SI: Change formatting of printed registers.	2013-11-12 02:35:51 +00:00
SPARC	[SparcV9] Handle i64 <-> float conversions in sparcv9 mode.	2013-11-03 12:28:40 +00:00
SystemZ	[SystemZ] Automatically detect zEC12 and z196 hosts	2013-10-31 12:14:17 +00:00
Thumb	17309 ARM backend incorrectly lowers COPY_STRUCT_BYVAL_I32 for thumb1 targets	2013-10-17 19:52:05 +00:00
Thumb2	MachineSink: Fix and tweak critical-edge breaking heuristic.	2013-10-14 16:57:17 +00:00
X86	Fix the recently added anyregcc convention to handle spilled operands.	2013-11-11 22:40:25 +00:00
XCore	XCore target: fix bug in aligning 'byval i8*' on the stack	2013-11-12 10:11:35 +00:00