.. |
AArch64
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[AArch64] Updating .arch_extension negative tests
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2020-12-18 15:57:11 +00:00 |
AMDGPU
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[AMDGPU][MC][NFC] Lit tests cleanup
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2020-12-21 20:04:02 +03:00 |
ARM
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[llvm-readobj] - For SHT_REL relocations, don't display an addend.
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2020-12-14 12:03:00 +03:00 |
AVR
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[AVRInstPrinter] printOperand: support llvm-objdump --print-imm-hex
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2020-07-12 08:14:52 -07:00 |
AsmParser
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[AsmParser] make .ascii support spaces as separators
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2020-12-20 22:41:00 -08:00 |
BPF
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[test] llvm/test/: change llvm-objdump single-dash long options to double-dash options
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2020-03-15 17:46:23 -07:00 |
COFF
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[CodeView] Fix inline sites that are missing code offsets.
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2020-12-07 13:01:53 -08:00 |
Disassembler
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[WebAssembly][SIMD] Rename shuffle, swizzle, and load_splats
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2020-12-22 14:29:06 -08:00 |
ELF
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[MC][test] Reorganize .cfi_* tests
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2020-12-21 17:18:28 -08:00 |
Hexagon
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[llvm-readobj] Update tests because of changes in llvm-readobj behavior
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2020-07-20 10:39:04 +01:00 |
Lanai
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…
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MSP430
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[llvm-readobj] Update tests because of changes in llvm-readobj behavior
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2020-07-20 10:39:04 +01:00 |
MachO
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[Triple][MachO] Define "arm64e", an AArch64 subarch for Pointer Auth.
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2020-12-03 07:53:59 -08:00 |
Mips
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[MC][ELF] Allow STT_SECTION referencing SHF_MERGE on REL targets
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2020-12-20 18:37:14 -08:00 |
PowerPC
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[PowerPC] Correct the bit-width definition for some imm operand in td.
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2020-12-08 03:20:12 +00:00 |
RISCV
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[RISCV] V does not imply F.
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2020-12-17 10:57:36 +08:00 |
Sparc
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[llvm-readobj] Update tests because of changes in llvm-readobj behavior
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2020-07-20 10:39:04 +01:00 |
SystemZ
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[SystemZ] Adding extra extended mnemonics for SystemZ target
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2020-12-02 08:25:31 -05:00 |
VE
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[VE] Add missing BCR format
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2020-10-29 23:30:49 +09:00 |
WebAssembly
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[WebAssembly][SIMD] Rename shuffle, swizzle, and load_splats
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2020-12-22 14:29:06 -08:00 |
X86
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[MC][test] Reorganize .cfi_* tests
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2020-12-21 17:18:28 -08:00 |