forked from OSchip/llvm-project
50 lines
2.3 KiB
LLVM
50 lines
2.3 KiB
LLVM
; RUN: llc -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+lwp < %s | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-unknown"
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; Stack reload folding tests.
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;
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; By including a nop call with sideeffects we can force a partial register spill of the
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; relevant registers and check that the reload is correctly folded into the instruction.
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define i8 @stack_fold_lwpins_u32(i32 %a0, i32 %a1) {
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; CHECK-LABEL: stack_fold_lwpins_u32
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; CHECK: # BB#0:
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; CHECK: lwpins $2814, {{-?[0-9]*}}(%rsp), %eax {{.*#+}} 4-byte Folded Reload
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%1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
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%2 = tail call i8 @llvm.x86.lwpins32(i32 %a0, i32 %a1, i32 2814)
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ret i8 %2
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}
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declare i8 @llvm.x86.lwpins32(i32, i32, i32)
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define i8 @stack_fold_lwpins_u64(i64 %a0, i32 %a1) {
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; CHECK-LABEL: stack_fold_lwpins_u64
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; CHECK: # BB#0:
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; CHECK: lwpins $2814, {{-?[0-9]*}}(%rsp), %rax {{.*#+}} 4-byte Folded Reload
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%1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
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%2 = tail call i8 @llvm.x86.lwpins64(i64 %a0, i32 %a1, i32 2814)
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ret i8 %2
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}
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declare i8 @llvm.x86.lwpins64(i64, i32, i32)
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define void @stack_fold_lwpval_u32(i32 %a0, i32 %a1) {
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; CHECK-LABEL: stack_fold_lwpval_u32
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; CHECK: # BB#0:
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; CHECK: lwpval $2814, {{-?[0-9]*}}(%rsp), %eax {{.*#+}} 4-byte Folded Reload
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%1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
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tail call void @llvm.x86.lwpval32(i32 %a0, i32 %a1, i32 2814)
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ret void
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}
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declare void @llvm.x86.lwpval32(i32, i32, i32)
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define void @stack_fold_lwpval_u64(i64 %a0, i32 %a1) {
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; CHECK-LABEL: stack_fold_lwpval_u64
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; CHECK: # BB#0:
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; CHECK: lwpval $2814, {{-?[0-9]*}}(%rsp), %rax {{.*#+}} 4-byte Folded Reload
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%1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
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tail call void @llvm.x86.lwpval64(i64 %a0, i32 %a1, i32 2814)
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ret void
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}
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declare void @llvm.x86.lwpval64(i64, i32, i32)
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