forked from OSchip/llvm-project
418 lines
15 KiB
C++
418 lines
15 KiB
C++
//===- TruncInstCombine.cpp -----------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// TruncInstCombine - looks for expression dags post-dominated by TruncInst and
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// for each eligible dag, it will create a reduced bit-width expression, replace
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// the old expression with this new one and remove the old expression.
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// Eligible expression dag is such that:
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// 1. Contains only supported instructions.
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// 2. Supported leaves: ZExtInst, SExtInst, TruncInst and Constant value.
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// 3. Can be evaluated into type with reduced legal bit-width.
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// 4. All instructions in the dag must not have users outside the dag.
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// The only exception is for {ZExt, SExt}Inst with operand type equal to
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// the new reduced type evaluated in (3).
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//
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// The motivation for this optimization is that evaluating and expression using
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// smaller bit-width is preferable, especially for vectorization where we can
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// fit more values in one vectorized instruction. In addition, this optimization
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// may decrease the number of cast instructions, but will not increase it.
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//
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//===----------------------------------------------------------------------===//
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#include "AggressiveInstCombineInternal.h"
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#include "llvm/ADT/MapVector.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/Analysis/ConstantFolding.h"
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#include "llvm/Analysis/TargetLibraryInfo.h"
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#include "llvm/IR/DataLayout.h"
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#include "llvm/IR/Dominators.h"
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#include "llvm/IR/IRBuilder.h"
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using namespace llvm;
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#define DEBUG_TYPE "aggressive-instcombine"
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/// Given an instruction and a container, it fills all the relevant operands of
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/// that instruction, with respect to the Trunc expression dag optimizaton.
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static void getRelevantOperands(Instruction *I, SmallVectorImpl<Value *> &Ops) {
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unsigned Opc = I->getOpcode();
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switch (Opc) {
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case Instruction::Trunc:
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case Instruction::ZExt:
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case Instruction::SExt:
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// These CastInst are considered leaves of the evaluated expression, thus,
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// their operands are not relevent.
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break;
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case Instruction::Add:
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case Instruction::Sub:
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case Instruction::Mul:
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case Instruction::And:
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case Instruction::Or:
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case Instruction::Xor:
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Ops.push_back(I->getOperand(0));
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Ops.push_back(I->getOperand(1));
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break;
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default:
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llvm_unreachable("Unreachable!");
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}
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}
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bool TruncInstCombine::buildTruncExpressionDag() {
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SmallVector<Value *, 8> Worklist;
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SmallVector<Instruction *, 8> Stack;
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// Clear old expression dag.
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InstInfoMap.clear();
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Worklist.push_back(CurrentTruncInst->getOperand(0));
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while (!Worklist.empty()) {
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Value *Curr = Worklist.back();
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if (isa<Constant>(Curr)) {
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Worklist.pop_back();
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continue;
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}
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auto *I = dyn_cast<Instruction>(Curr);
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if (!I)
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return false;
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if (!Stack.empty() && Stack.back() == I) {
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// Already handled all instruction operands, can remove it from both the
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// Worklist and the Stack, and add it to the instruction info map.
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Worklist.pop_back();
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Stack.pop_back();
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// Insert I to the Info map.
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InstInfoMap.insert(std::make_pair(I, Info()));
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continue;
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}
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if (InstInfoMap.count(I)) {
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Worklist.pop_back();
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continue;
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}
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// Add the instruction to the stack before start handling its operands.
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Stack.push_back(I);
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unsigned Opc = I->getOpcode();
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switch (Opc) {
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case Instruction::Trunc:
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case Instruction::ZExt:
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case Instruction::SExt:
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// trunc(trunc(x)) -> trunc(x)
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// trunc(ext(x)) -> ext(x) if the source type is smaller than the new dest
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// trunc(ext(x)) -> trunc(x) if the source type is larger than the new
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// dest
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break;
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case Instruction::Add:
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case Instruction::Sub:
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case Instruction::Mul:
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case Instruction::And:
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case Instruction::Or:
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case Instruction::Xor: {
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SmallVector<Value *, 2> Operands;
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getRelevantOperands(I, Operands);
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for (Value *Operand : Operands)
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Worklist.push_back(Operand);
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break;
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}
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default:
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// TODO: Can handle more cases here:
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// 1. select, shufflevector, extractelement, insertelement
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// 2. udiv, urem
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// 3. shl, lshr, ashr
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// 4. phi node(and loop handling)
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// ...
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return false;
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}
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}
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return true;
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}
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unsigned TruncInstCombine::getMinBitWidth() {
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SmallVector<Value *, 8> Worklist;
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SmallVector<Instruction *, 8> Stack;
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Value *Src = CurrentTruncInst->getOperand(0);
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Type *DstTy = CurrentTruncInst->getType();
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unsigned TruncBitWidth = DstTy->getScalarSizeInBits();
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unsigned OrigBitWidth =
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CurrentTruncInst->getOperand(0)->getType()->getScalarSizeInBits();
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if (isa<Constant>(Src))
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return TruncBitWidth;
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Worklist.push_back(Src);
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InstInfoMap[cast<Instruction>(Src)].ValidBitWidth = TruncBitWidth;
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while (!Worklist.empty()) {
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Value *Curr = Worklist.back();
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if (isa<Constant>(Curr)) {
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Worklist.pop_back();
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continue;
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}
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// Otherwise, it must be an instruction.
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auto *I = cast<Instruction>(Curr);
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auto &Info = InstInfoMap[I];
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SmallVector<Value *, 2> Operands;
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getRelevantOperands(I, Operands);
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if (!Stack.empty() && Stack.back() == I) {
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// Already handled all instruction operands, can remove it from both, the
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// Worklist and the Stack, and update MinBitWidth.
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Worklist.pop_back();
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Stack.pop_back();
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for (auto *Operand : Operands)
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if (auto *IOp = dyn_cast<Instruction>(Operand))
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Info.MinBitWidth =
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std::max(Info.MinBitWidth, InstInfoMap[IOp].MinBitWidth);
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continue;
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}
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// Add the instruction to the stack before start handling its operands.
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Stack.push_back(I);
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unsigned ValidBitWidth = Info.ValidBitWidth;
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// Update minimum bit-width before handling its operands. This is required
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// when the instruction is part of a loop.
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Info.MinBitWidth = std::max(Info.MinBitWidth, Info.ValidBitWidth);
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for (auto *Operand : Operands)
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if (auto *IOp = dyn_cast<Instruction>(Operand)) {
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// If we already calculated the minimum bit-width for this valid
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// bit-width, or for a smaller valid bit-width, then just keep the
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// answer we already calculated.
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unsigned IOpBitwidth = InstInfoMap.lookup(IOp).ValidBitWidth;
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if (IOpBitwidth >= ValidBitWidth)
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continue;
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InstInfoMap[IOp].ValidBitWidth = std::max(ValidBitWidth, IOpBitwidth);
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Worklist.push_back(IOp);
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}
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}
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unsigned MinBitWidth = InstInfoMap.lookup(cast<Instruction>(Src)).MinBitWidth;
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assert(MinBitWidth >= TruncBitWidth);
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if (MinBitWidth > TruncBitWidth) {
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// In this case reducing expression with vector type might generate a new
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// vector type, which is not preferable as it might result in generating
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// sub-optimal code.
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if (DstTy->isVectorTy())
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return OrigBitWidth;
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// Use the smallest integer type in the range [MinBitWidth, OrigBitWidth).
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Type *Ty = DL.getSmallestLegalIntType(DstTy->getContext(), MinBitWidth);
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// Update minimum bit-width with the new destination type bit-width if
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// succeeded to find such, otherwise, with original bit-width.
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MinBitWidth = Ty ? Ty->getScalarSizeInBits() : OrigBitWidth;
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} else { // MinBitWidth == TruncBitWidth
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// In this case the expression can be evaluated with the trunc instruction
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// destination type, and trunc instruction can be omitted. However, we
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// should not perform the evaluation if the original type is a legal scalar
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// type and the target type is illegal.
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bool FromLegal = MinBitWidth == 1 || DL.isLegalInteger(OrigBitWidth);
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bool ToLegal = MinBitWidth == 1 || DL.isLegalInteger(MinBitWidth);
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if (!DstTy->isVectorTy() && FromLegal && !ToLegal)
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return OrigBitWidth;
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}
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return MinBitWidth;
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}
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Type *TruncInstCombine::getBestTruncatedType() {
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if (!buildTruncExpressionDag())
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return nullptr;
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// We don't want to duplicate instructions, which isn't profitable. Thus, we
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// can't shrink something that has multiple users, unless all users are
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// post-dominated by the trunc instruction, i.e., were visited during the
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// expression evaluation.
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unsigned DesiredBitWidth = 0;
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for (auto Itr : InstInfoMap) {
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Instruction *I = Itr.first;
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if (I->hasOneUse())
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continue;
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bool IsExtInst = (isa<ZExtInst>(I) || isa<SExtInst>(I));
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for (auto *U : I->users())
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if (auto *UI = dyn_cast<Instruction>(U))
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if (UI != CurrentTruncInst && !InstInfoMap.count(UI)) {
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if (!IsExtInst)
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return nullptr;
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// If this is an extension from the dest type, we can eliminate it,
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// even if it has multiple users. Thus, update the DesiredBitWidth and
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// validate all extension instructions agrees on same DesiredBitWidth.
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unsigned ExtInstBitWidth =
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I->getOperand(0)->getType()->getScalarSizeInBits();
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if (DesiredBitWidth && DesiredBitWidth != ExtInstBitWidth)
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return nullptr;
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DesiredBitWidth = ExtInstBitWidth;
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}
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}
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unsigned OrigBitWidth =
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CurrentTruncInst->getOperand(0)->getType()->getScalarSizeInBits();
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// Calculate minimum allowed bit-width allowed for shrinking the currently
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// visited truncate's operand.
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unsigned MinBitWidth = getMinBitWidth();
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// Check that we can shrink to smaller bit-width than original one and that
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// it is similar to the DesiredBitWidth is such exists.
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if (MinBitWidth >= OrigBitWidth ||
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(DesiredBitWidth && DesiredBitWidth != MinBitWidth))
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return nullptr;
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return IntegerType::get(CurrentTruncInst->getContext(), MinBitWidth);
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}
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/// Given a reduced scalar type \p Ty and a \p V value, return a reduced type
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/// for \p V, according to its type, if it vector type, return the vector
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/// version of \p Ty, otherwise return \p Ty.
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static Type *getReducedType(Value *V, Type *Ty) {
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assert(Ty && !Ty->isVectorTy() && "Expect Scalar Type");
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if (auto *VTy = dyn_cast<VectorType>(V->getType()))
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return VectorType::get(Ty, VTy->getNumElements());
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return Ty;
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}
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Value *TruncInstCombine::getReducedOperand(Value *V, Type *SclTy) {
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Type *Ty = getReducedType(V, SclTy);
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if (auto *C = dyn_cast<Constant>(V)) {
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C = ConstantExpr::getIntegerCast(C, Ty, false);
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// If we got a constantexpr back, try to simplify it with DL info.
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if (Constant *FoldedC = ConstantFoldConstant(C, DL, &TLI))
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C = FoldedC;
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return C;
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}
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auto *I = cast<Instruction>(V);
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Info Entry = InstInfoMap.lookup(I);
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assert(Entry.NewValue);
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return Entry.NewValue;
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}
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void TruncInstCombine::ReduceExpressionDag(Type *SclTy) {
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for (auto &Itr : InstInfoMap) { // Forward
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Instruction *I = Itr.first;
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TruncInstCombine::Info &NodeInfo = Itr.second;
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assert(!NodeInfo.NewValue && "Instruction has been evaluated");
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IRBuilder<> Builder(I);
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Value *Res = nullptr;
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unsigned Opc = I->getOpcode();
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switch (Opc) {
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case Instruction::Trunc:
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case Instruction::ZExt:
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case Instruction::SExt: {
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Type *Ty = getReducedType(I, SclTy);
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// If the source type of the cast is the type we're trying for then we can
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// just return the source. There's no need to insert it because it is not
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// new.
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if (I->getOperand(0)->getType() == Ty) {
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assert(!isa<TruncInst>(I) && "Cannot reach here with TruncInst");
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NodeInfo.NewValue = I->getOperand(0);
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continue;
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}
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// Otherwise, must be the same type of cast, so just reinsert a new one.
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// This also handles the case of zext(trunc(x)) -> zext(x).
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Res = Builder.CreateIntCast(I->getOperand(0), Ty,
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Opc == Instruction::SExt);
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// Update Worklist entries with new value if needed.
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// There are three possible changes to the Worklist:
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// 1. Update Old-TruncInst -> New-TruncInst.
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// 2. Remove Old-TruncInst (if New node is not TruncInst).
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// 3. Add New-TruncInst (if Old node was not TruncInst).
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auto Entry = find(Worklist, I);
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if (Entry != Worklist.end()) {
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if (auto *NewCI = dyn_cast<TruncInst>(Res))
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*Entry = NewCI;
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else
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Worklist.erase(Entry);
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} else if (auto *NewCI = dyn_cast<TruncInst>(Res))
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Worklist.push_back(NewCI);
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break;
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}
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case Instruction::Add:
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case Instruction::Sub:
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case Instruction::Mul:
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case Instruction::And:
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case Instruction::Or:
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case Instruction::Xor: {
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Value *LHS = getReducedOperand(I->getOperand(0), SclTy);
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Value *RHS = getReducedOperand(I->getOperand(1), SclTy);
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Res = Builder.CreateBinOp((Instruction::BinaryOps)Opc, LHS, RHS);
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break;
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}
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default:
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llvm_unreachable("Unhandled instruction");
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}
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NodeInfo.NewValue = Res;
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if (auto *ResI = dyn_cast<Instruction>(Res))
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ResI->takeName(I);
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}
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Value *Res = getReducedOperand(CurrentTruncInst->getOperand(0), SclTy);
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Type *DstTy = CurrentTruncInst->getType();
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if (Res->getType() != DstTy) {
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IRBuilder<> Builder(CurrentTruncInst);
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Res = Builder.CreateIntCast(Res, DstTy, false);
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if (auto *ResI = dyn_cast<Instruction>(Res))
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ResI->takeName(CurrentTruncInst);
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}
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CurrentTruncInst->replaceAllUsesWith(Res);
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// Erase old expression dag, which was replaced by the reduced expression dag.
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// We iterate backward, which means we visit the instruction before we visit
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// any of its operands, this way, when we get to the operand, we already
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// removed the instructions (from the expression dag) that uses it.
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CurrentTruncInst->eraseFromParent();
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for (auto I = InstInfoMap.rbegin(), E = InstInfoMap.rend(); I != E; ++I) {
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// We still need to check that the instruction has no users before we erase
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// it, because {SExt, ZExt}Inst Instruction might have other users that was
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// not reduced, in such case, we need to keep that instruction.
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if (I->first->use_empty())
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I->first->eraseFromParent();
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}
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}
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bool TruncInstCombine::run(Function &F) {
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bool MadeIRChange = false;
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// Collect all TruncInst in the function into the Worklist for evaluating.
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for (auto &BB : F) {
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// Ignore unreachable basic block.
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if (!DT.isReachableFromEntry(&BB))
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continue;
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for (auto &I : BB)
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if (auto *CI = dyn_cast<TruncInst>(&I))
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Worklist.push_back(CI);
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}
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// Process all TruncInst in the Worklist, for each instruction:
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// 1. Check if it dominates an eligible expression dag to be reduced.
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// 2. Create a reduced expression dag and replace the old one with it.
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while (!Worklist.empty()) {
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CurrentTruncInst = Worklist.pop_back_val();
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if (Type *NewDstSclTy = getBestTruncatedType()) {
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LLVM_DEBUG(
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dbgs() << "ICE: TruncInstCombine reducing type of expression dag "
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"dominated by: "
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<< CurrentTruncInst << '\n');
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ReduceExpressionDag(NewDstSclTy);
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MadeIRChange = true;
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}
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}
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return MadeIRChange;
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}
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