forked from OSchip/llvm-project
98 lines
5.0 KiB
LLVM
98 lines
5.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -S -mtriple=x86_64-unknown -mattr=+avx -slp-vectorizer | FileCheck %s
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define i32 @jumbled-load(i32* noalias nocapture %in, i32* noalias nocapture %inn, i32* noalias nocapture %out) {
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; CHECK-LABEL: @jumbled-load(
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; CHECK-NEXT: [[IN_ADDR:%.*]] = getelementptr inbounds i32, i32* [[IN:%.*]], i64 0
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; CHECK-NEXT: [[INN_ADDR:%.*]] = getelementptr inbounds i32, i32* [[INN:%.*]], i64 0
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; CHECK-NEXT: [[GEP_7:%.*]] = getelementptr inbounds i32, i32* [[OUT:%.*]], i64 0
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; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[IN_ADDR]] to <4 x i32>*
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; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i32>, <4 x i32>* [[TMP1]], align 4
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; CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[INN_ADDR]] to <4 x i32>*
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; CHECK-NEXT: [[TMP4:%.*]] = load <4 x i32>, <4 x i32>* [[TMP3]], align 4
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; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <4 x i32> [[TMP4]], <4 x i32> poison, <4 x i32> <i32 2, i32 0, i32 3, i32 1>
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; CHECK-NEXT: [[TMP5:%.*]] = mul <4 x i32> [[TMP2]], [[SHUFFLE]]
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; CHECK-NEXT: [[SHUFFLE1:%.*]] = shufflevector <4 x i32> [[TMP5]], <4 x i32> poison, <4 x i32> <i32 1, i32 3, i32 2, i32 0>
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; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32* [[GEP_7]] to <4 x i32>*
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; CHECK-NEXT: store <4 x i32> [[SHUFFLE1]], <4 x i32>* [[TMP6]], align 4
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; CHECK-NEXT: ret i32 undef
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;
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%in.addr = getelementptr inbounds i32, i32* %in, i64 0
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%load.1 = load i32, i32* %in.addr, align 4
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%gep.1 = getelementptr inbounds i32, i32* %in.addr, i64 3
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%load.2 = load i32, i32* %gep.1, align 4
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%gep.2 = getelementptr inbounds i32, i32* %in.addr, i64 1
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%load.3 = load i32, i32* %gep.2, align 4
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%gep.3 = getelementptr inbounds i32, i32* %in.addr, i64 2
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%load.4 = load i32, i32* %gep.3, align 4
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%inn.addr = getelementptr inbounds i32, i32* %inn, i64 0
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%load.5 = load i32, i32* %inn.addr, align 4
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%gep.4 = getelementptr inbounds i32, i32* %inn.addr, i64 2
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%load.6 = load i32, i32* %gep.4, align 4
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%gep.5 = getelementptr inbounds i32, i32* %inn.addr, i64 3
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%load.7 = load i32, i32* %gep.5, align 4
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%gep.6 = getelementptr inbounds i32, i32* %inn.addr, i64 1
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%load.8 = load i32, i32* %gep.6, align 4
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%mul.1 = mul i32 %load.3, %load.5
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%mul.2 = mul i32 %load.2, %load.8
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%mul.3 = mul i32 %load.4, %load.7
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%mul.4 = mul i32 %load.1, %load.6
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%gep.7 = getelementptr inbounds i32, i32* %out, i64 0
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store i32 %mul.1, i32* %gep.7, align 4
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%gep.8 = getelementptr inbounds i32, i32* %out, i64 1
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store i32 %mul.2, i32* %gep.8, align 4
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%gep.9 = getelementptr inbounds i32, i32* %out, i64 2
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store i32 %mul.3, i32* %gep.9, align 4
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%gep.10 = getelementptr inbounds i32, i32* %out, i64 3
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store i32 %mul.4, i32* %gep.10, align 4
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ret i32 undef
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}
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define i32 @jumbled-load-multiuses(i32* noalias nocapture %in, i32* noalias nocapture %out) {
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; CHECK-LABEL: @jumbled-load-multiuses(
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; CHECK-NEXT: [[IN_ADDR:%.*]] = getelementptr inbounds i32, i32* [[IN:%.*]], i64 0
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; CHECK-NEXT: [[GEP_7:%.*]] = getelementptr inbounds i32, i32* [[OUT:%.*]], i64 0
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; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[IN_ADDR]] to <4 x i32>*
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; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i32>, <4 x i32>* [[TMP1]], align 4
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; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i32> [[TMP2]], i32 1
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; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> poison, i32 [[TMP3]], i32 0
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; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x i32> [[TMP2]], i32 2
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; CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x i32> [[TMP4]], i32 [[TMP5]], i32 1
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; CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x i32> [[TMP2]], i32 0
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; CHECK-NEXT: [[TMP8:%.*]] = insertelement <4 x i32> [[TMP6]], i32 [[TMP7]], i32 2
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; CHECK-NEXT: [[TMP9:%.*]] = extractelement <4 x i32> [[TMP2]], i32 3
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; CHECK-NEXT: [[TMP10:%.*]] = insertelement <4 x i32> [[TMP8]], i32 [[TMP9]], i32 3
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; CHECK-NEXT: [[TMP11:%.*]] = mul <4 x i32> [[TMP2]], [[TMP10]]
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; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <4 x i32> [[TMP11]], <4 x i32> poison, <4 x i32> <i32 1, i32 3, i32 2, i32 0>
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; CHECK-NEXT: [[TMP12:%.*]] = bitcast i32* [[GEP_7]] to <4 x i32>*
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; CHECK-NEXT: store <4 x i32> [[SHUFFLE]], <4 x i32>* [[TMP12]], align 4
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; CHECK-NEXT: ret i32 undef
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;
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%in.addr = getelementptr inbounds i32, i32* %in, i64 0
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%load.1 = load i32, i32* %in.addr, align 4
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%gep.1 = getelementptr inbounds i32, i32* %in.addr, i64 3
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%load.2 = load i32, i32* %gep.1, align 4
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%gep.2 = getelementptr inbounds i32, i32* %in.addr, i64 1
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%load.3 = load i32, i32* %gep.2, align 4
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%gep.3 = getelementptr inbounds i32, i32* %in.addr, i64 2
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%load.4 = load i32, i32* %gep.3, align 4
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%mul.1 = mul i32 %load.3, %load.4
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%mul.2 = mul i32 %load.2, %load.2
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%mul.3 = mul i32 %load.4, %load.1
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%mul.4 = mul i32 %load.1, %load.3
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%gep.7 = getelementptr inbounds i32, i32* %out, i64 0
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store i32 %mul.1, i32* %gep.7, align 4
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%gep.8 = getelementptr inbounds i32, i32* %out, i64 1
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store i32 %mul.2, i32* %gep.8, align 4
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%gep.9 = getelementptr inbounds i32, i32* %out, i64 2
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store i32 %mul.3, i32* %gep.9, align 4
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%gep.10 = getelementptr inbounds i32, i32* %out, i64 3
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store i32 %mul.4, i32* %gep.10, align 4
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ret i32 undef
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}
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