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Artem Tamazov ebe71ce36a [AMDGPU][llvm-mc] Add support for sendmsg(...) syntax. 
Added support for sendmsg(MSG[, OP[, STREAM_ID]]) syntax
in s_sendmsg and s_sendmsghalt instructions.
The syntax matches the SP3 assembler/disassembler rules.
That is why implicit inputs (like M0 and EXEC) are not printed
to disassembly output anymore.

sendmsg(...) allows only known message types and attributes,
even if literals are used instead of symbolic names.
However, raw literal (without "sendmsg") still can be used,
and that allows for any 16-bit value.

Tests updated/added.

Differential Revision: http://reviews.llvm.org/D19596

llvm-svn: 268762
 		2016-05-06 17:48:48 +00:00
..
GlobalISel AMDGPU: Add skeleton GlobalIsel implementation 2016-04-14 19:09:28 +00:00
32-bit-local-address-space.ll AMDGPU: Emit error if too much LDS is used 2016-04-28 19:37:35 +00:00
README
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add-debug.ll
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add.ll AMDGPU: Run r600 tests last 2016-05-05 20:07:37 +00:00
add_i64.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
address-space.ll PeepholeOptimizer: Remove redundant copies 2015-09-25 20:22:12 +00:00
addrspacecast.ll AMDGPU/SI: Enable the post-ra scheduler 2016-04-30 00:23:06 +00:00
amdgpu-shader-calling-convention.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
and-gcn.ll AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions 2016-02-12 23:45:29 +00:00
and.ll AMDGPU: Run r600 tests last 2016-05-05 20:07:37 +00:00
annotate-kernel-features-hsa.ll AMDGPU: Implement addrspacecast 2016-04-25 19:27:24 +00:00
annotate-kernel-features.ll AMDGPU: Stop checking intrinsics not used by HSA for dispatch-ptr 2016-01-30 05:10:59 +00:00
anyext.ll
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array-ptr-calc-i32.ll AMDGPU: Fix mishandling array allocations when promoting alloca 2016-04-28 18:38:48 +00:00
array-ptr-calc-i64.ll AMDGPU: Avoid using 64-bit shift for i64 (shl x, 32) 2015-07-14 18:20:33 +00:00
atomic_cmp_swap_local.ll AMDGPU/SI: Use the hazard recognizer to break SMEM soft clauses 2016-05-02 17:39:06 +00:00
atomic_load_add.ll
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atomic_load_sub.ll AMDGPU: Run r600 tests last 2016-05-05 20:07:37 +00:00
basic-branch.ll
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basic-loop.ll
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bfe_uint.ll
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bfi_int.ll
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bfm.ll AMDGPU: Remove bfi and bfm intrinsics 2016-02-08 19:06:01 +00:00
big_alu.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
bitcast.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
bitreverse-inline-immediates.ll AMDGPU: Make i64 loads/stores promote to v2i32 2016-05-02 20:07:26 +00:00
bitreverse.ll AMDGPU: Use generic bitreverse intrinsic 2015-12-14 17:25:38 +00:00
branch-uniformity.ll [DivergenceAnalysis] Treat PHI with incoming undef as constant 2016-04-14 17:42:47 +00:00
bswap.ll
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bug-vopc-commute.ll AMDGPU: Guard VOPC instructions against incorrect commute 2016-04-19 21:58:22 +00:00
build_vector.ll
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call.ll Refactor backend diagnostics for unsupported features 2016-02-02 13:52:43 +00:00
call_fs.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
calling-conventions.ll AMDGPU/SI: Remove calling convention assertion from LowerFormalArguments() 2015-10-06 21:16:34 +00:00
captured-frame-index.ll AMDGPU/SI: Enable the post-ra scheduler 2016-04-30 00:23:06 +00:00
cayman-loop-bug.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
cf-stack-bug.ll
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cf_end.ll
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cgp-addressing-modes-flat.ll AMDGPU/SI: Assembler: Unify parsing/printing of operands. 2016-04-29 09:02:30 +00:00
cgp-addressing-modes.ll AMDGPU/SI: Assembler: Unify parsing/printing of operands. 2016-04-29 09:02:30 +00:00
cgp-bitfield-extract.ll DAGCombiner: Reduce 64-bit BFE pattern to pattern on 32-bit component 2016-04-21 18:03:06 +00:00
ci-use-flat-for-global.ll AMDGPU: Set flat_scratch from flat_scratch_init reg 2016-02-12 06:31:30 +00:00
coalescer_distribute.ll LiveInterval: Fix Distribute() failing on liveranges with unused VNInfos 2016-03-24 21:41:38 +00:00
coalescer_remat.ll
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codegen-prepare-addrmode-sext.ll
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combine_vloads.ll
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commute-compares.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
commute-shifts.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
commute_modifiers.ll AMDGPU: Run SIFoldOperands after PeepholeOptimizer 2016-04-14 21:58:24 +00:00
complex-folding.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
concat_vectors.ll
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copy-illegal-type.ll fix checks: *_DAG -> *-DAG 2016-03-28 22:11:06 +00:00
copy-to-reg.ll
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ctlz.ll AMDGPU/SI: Enable lanemask tracking in misched 2016-03-30 16:35:09 +00:00
ctlz_zero_undef.ll AMDGPU/SI: Enable lanemask tracking in misched 2016-03-30 16:35:09 +00:00
ctpop.ll AMDGPU/SI: Assembler: Unify parsing/printing of operands. 2016-04-29 09:02:30 +00:00
ctpop64.ll AMDGPU/SI: Enable lanemask tracking in misched 2016-03-30 16:35:09 +00:00
cttz_zero_undef.ll
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cube.ll AMDGPU: Add new amdgcn intrinsics for cube instructions 2016-01-26 04:29:56 +00:00
cvt_f32_ubyte.ll AMDGPU: add llvm.amdgcn.buffer.load/store intrinsics 2016-04-12 21:18:10 +00:00
cvt_flr_i32_f32.ll
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cvt_rpi_i32_f32.ll
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dagcombine-reassociate-bug.ll AMDGPU: Add volatile to test loads and stores 2016-04-12 13:38:18 +00:00
dagcombiner-bug-illegal-vec4-int-to-fp.ll
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debug.ll
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debugger_insert_nops.ll [AMDGPU] Insert nop pass: take care of outstanding feedback 2016-04-22 17:04:51 +00:00
debugger_reserve_trap_regs.ll [AMDGPU] Reserve VGPRs for trap handler usage if instructed 2016-04-26 15:43:14 +00:00
default-fp-mode.ll
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detect-dead-lanes.mir CodeGen: Add DetectDeadLanes pass. 2016-04-28 03:07:16 +00:00
disconnected-predset-break-bug.ll
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dot4-folding.ll
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drop-mem-operand-move-smrd.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
ds-negative-offset-addressing-mode-loop.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
ds-sub-offset.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
ds_read2.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
ds_read2_offset_order.ll AMDGPU/SI: Improve MachineSchedModel definition 2016-03-30 16:35:13 +00:00
ds_read2_superreg.ll AMDGPU/SI: Enable lanemask tracking in misched 2016-03-30 16:35:09 +00:00
ds_read2st64.ll AMDGPU/SI: Enable lanemask tracking in misched 2016-03-30 16:35:09 +00:00
ds_write2.ll AMDGPU: Add volatile to test loads and stores 2016-04-12 13:38:18 +00:00
ds_write2st64.ll AMDGPU: Add volatile to test loads and stores 2016-04-12 13:38:18 +00:00
dynamic_stackalloc.ll Refactor backend diagnostics for unsupported features 2016-02-02 13:52:43 +00:00
elf.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
elf.r600.ll
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empty-function.ll
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endcf-loop-header.ll AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions 2016-02-12 23:45:29 +00:00
extload-private.ll
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extload.ll AMDGPU: Fix alignments in test 2016-02-22 21:04:23 +00:00
extract-vector-elt-i8.ll AMDGPU: Make v32i8/v64i8 illegal types 2016-01-26 04:43:48 +00:00
extract-vector-elt-i64.ll AMDGPU: Make v2i64/v2f64 legal types. 2015-11-25 19:58:34 +00:00
extract_vector_elt_i16.ll
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extractelt-to-trunc.ll AMDGPU: add llvm.amdgcn.buffer.load/store intrinsics 2016-04-12 21:18:10 +00:00
fabs.f64.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
fabs.ll
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fadd.ll AMDGPU: Run r600 tests last 2016-05-05 20:07:37 +00:00
fadd64.ll AMDGPU: Make v2i64/v2f64 legal types. 2015-11-25 19:58:34 +00:00
fcanonicalize.ll AMDGPU: Make i64 loads/stores promote to v2i32 2016-05-02 20:07:26 +00:00
fceil.ll
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fceil64.ll AMDGPU: Use s_addk_i32 / s_mulk_i32 2016-04-16 01:46:49 +00:00
fcmp-cnd.ll
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fcmp-cnde-int-args.ll
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fcmp.ll Fix CHECK directives that weren't checking. 2015-08-31 21:10:35 +00:00
fcmp64.ll
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fconst64.ll
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fcopysign.f32.ll
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fcopysign.f64.ll AMDGPU/SI: Enable lanemask tracking in misched 2016-03-30 16:35:09 +00:00
fdiv.f64.ll AMDGPU/SI: Assembler: Unify parsing/printing of operands. 2016-04-29 09:02:30 +00:00
fdiv.ll AMDGPU: Run r600 tests last 2016-05-05 20:07:37 +00:00
fetch-limits.r600.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
fetch-limits.r700+.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
ffloor.f64.ll AMDGPU/SI: Enable lanemask tracking in misched 2016-03-30 16:35:09 +00:00
ffloor.ll
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flat-address-space.ll [AMDGPU] Assembler: Swap operands of flat_store instructions to match AMD assembler 2016-02-12 17:57:54 +00:00
flat-scratch-reg.ll AMDGPU/SI: xnack_mask is always reserved on VI 2016-01-07 17:10:20 +00:00
floor.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
fma-combine.ll AMDGPU: Add volatile to test loads and stores 2016-04-12 13:38:18 +00:00
fma.f64.ll
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fma.ll AMDGPU: Run SIFoldOperands after PeepholeOptimizer 2016-04-14 21:58:24 +00:00
fmad.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
fmax.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
fmax3.f64.ll AMDGPU/SI: Assembler: Unify parsing/printing of operands. 2016-04-29 09:02:30 +00:00
fmax3.ll
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fmax_legacy.f64.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
fmax_legacy.ll AMDGPU: Add volatile to test loads and stores 2016-04-12 13:38:18 +00:00
fmaxnum.f64.ll
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fmaxnum.ll AMDGPU: Materialize sign bits with bfrev 2016-03-11 07:42:49 +00:00
fmed3.ll AMDGPU: Run SIFoldOperands after PeepholeOptimizer 2016-04-14 21:58:24 +00:00
fmin.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
fmin3.ll
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fmin_legacy.f64.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
fmin_legacy.ll AMDGPU: Add volatile to test loads and stores 2016-04-12 13:38:18 +00:00
fminnum.f64.ll
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fminnum.ll AMDGPU: Materialize sign bits with bfrev 2016-03-11 07:42:49 +00:00
fmul-2-combine-multi-use.ll AMDGPU: Add volatile to test loads and stores 2016-04-12 13:38:18 +00:00
fmul.ll
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fmul64.ll
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fmuladd.ll AMDGPU: Add volatile to test loads and stores 2016-04-12 13:38:18 +00:00
fnearbyint.ll
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fneg-fabs.f64.ll AMDGPU/SI: Use the hazard recognizer to break SMEM soft clauses 2016-05-02 17:39:06 +00:00
fneg-fabs.ll AMDGPU/SI: use S_OR for fneg (fabs f32) 2015-10-29 15:29:05 +00:00
fneg.f64.ll AMDGPU: Run SIFoldOperands after PeepholeOptimizer 2016-04-14 21:58:24 +00:00
fneg.ll
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fp-classify.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
fp16_to_fp.ll
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fp32_to_fp16.ll
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fp_to_sint.f64.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
fp_to_sint.ll AMDGPU: Run r600 tests last 2016-05-05 20:07:37 +00:00
fp_to_uint.f64.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
fp_to_uint.ll
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fpext.ll
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fptrunc.ll
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fract.f64.ll AMDGPU/SI: Enable the post-ra scheduler 2016-04-30 00:23:06 +00:00
fract.ll AMDGPU: Remove AMDGPU.fract intrinsic 2016-01-22 18:42:38 +00:00
frem.ll
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fsqrt.ll
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fsub.ll AMDGPU: Run r600 tests last 2016-05-05 20:07:37 +00:00
fsub64.ll AMDGPU: Run SIFoldOperands after PeepholeOptimizer 2016-04-14 21:58:24 +00:00
ftrunc.f64.ll AMDGPU: Use s_addk_i32 / s_mulk_i32 2016-04-16 01:46:49 +00:00
ftrunc.ll AMDGPU: Run r600 tests last 2016-05-05 20:07:37 +00:00
gep-address-space.ll DAGCombiner: Combine extract_vector_elt from build_vector 2015-10-12 23:59:50 +00:00
global-constant.ll AMDGPU/SI: Add support for AMD code object version 2. 2016-05-05 17:03:33 +00:00
global-directive.ll
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global-extload-i1.ll
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global-extload-i8.ll
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global-extload-i16.ll
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global-extload-i32.ll AMDGPU: Make v2i64/v2f64 legal types. 2015-11-25 19:58:34 +00:00
global-zero-initializer.ll Refactor backend diagnostics for unsupported features 2016-02-02 13:52:43 +00:00
global_atomics.ll AMDGPU/SI: Assembler: Unify parsing/printing of operands. 2016-04-29 09:02:30 +00:00
global_atomics_i64.ll AMDGPU/SI: Assembler: Unify parsing/printing of operands. 2016-04-29 09:02:30 +00:00
gv-const-addrspace-fail.ll
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gv-const-addrspace.ll AMDGPU: don't match vgpr loads for constant loads 2015-07-27 18:16:08 +00:00
half.ll AMDGPU/SI: Enable the post-ra scheduler 2016-04-30 00:23:06 +00:00
hsa-default-device.ll AMDGPU: Fix default device handling 2016-01-27 02:17:49 +00:00
hsa-fp-mode.ll AMDGPU: Set DX10Clamp bit 2016-01-28 20:53:35 +00:00
hsa-globals.ll AMDGPU/SI: Add support for AMD code object version 2. 2016-05-05 17:03:33 +00:00
hsa-group-segment.ll AMDGPU/SI: Don't emit group segment global variables 2015-12-02 17:00:42 +00:00
hsa-note-no-func.ll AMDGPU/SI: Add support for AMD code object version 2. 2016-05-05 17:03:33 +00:00
hsa.ll AMDGPU/SI: Add amdgpu_kernel calling convention. Part 1. 2016-05-06 09:07:29 +00:00
i1-copy-implicit-def.ll AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions 2016-02-12 23:45:29 +00:00
i1-copy-phi.ll AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions 2016-02-12 23:45:29 +00:00
i8-to-double-to-float.ll
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icmp-select-sete-reverse-args.ll
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icmp64.ll
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image-attributes.ll ScheduleDAGInstrs: Rework schedule graph builder. 2015-12-04 01:51:19 +00:00
image-resource-id.ll AMDGPU: Add pass to lower OpenCL image and sampler arguments. 2015-08-07 23:19:30 +00:00
imm.ll AMDGPU: Make i64 loads/stores promote to v2i32 2016-05-02 20:07:26 +00:00
indirect-addressing-si.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
indirect-private-64.ll AMDGPU: Fix mishandling array allocations when promoting alloca 2016-04-28 18:38:48 +00:00
infinite-loop-evergreen.ll
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infinite-loop.ll
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inline-asm.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
inline-calls.ll
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inline-constraints.ll AMDGPU/SI: Add support for sgpr and vgpr inline assembly constraints 2015-12-10 02:12:53 +00:00
input-mods.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
insert_subreg.ll
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insert_vector_elt.ll AMDGPU/SI: Enable the post-ra scheduler 2016-04-30 00:23:06 +00:00
invalid-addrspacecast.ll AMDGPU: Implement addrspacecast 2016-04-25 19:27:24 +00:00
invariant-load-no-alias-store.ll AMDGPU/SI: Enable the post-ra scheduler 2016-04-30 00:23:06 +00:00
jump-address.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
kcache-fold.ll AMDGPU: Replace some deprecated intrinsic uses in tests 2016-01-23 05:42:49 +00:00
kernel-args.ll AMDGPU: Remove SIPrepareScratchRegs 2015-11-30 21:15:53 +00:00
large-alloca-compute.ll AMDGPU: Set flat_scratch from flat_scratch_init reg 2016-02-12 06:31:30 +00:00
large-alloca-graphics.ll AMDGPU/SI: Use the correct scratch wave offset register for shaders. 2016-04-14 16:27:03 +00:00
large-constant-initializer.ll
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large-work-group-promote-alloca.ll AMDGPU: allow specifying a workgroup size that needs to fit in a compute unit 2016-04-14 16:27:07 +00:00
large-work-group-registers.ll AMDGPU: allow specifying a workgroup size that needs to fit in a compute unit 2016-04-14 16:27:07 +00:00
lds-alignment.ll AMDGPU: Account for LDS alignment 2016-02-05 19:47:29 +00:00
lds-initializer.ll Refactor backend diagnostics for unsupported features 2016-02-02 13:52:43 +00:00
lds-m0-init-in-loop.ll AMDGPU: Add test for m0 initialization in basic loop 2016-04-13 00:39:52 +00:00
lds-oqap-crash.ll
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lds-output-queue.ll
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lds-size.ll AMDGPU: Include LDS size in printed comment 2016-04-14 22:11:51 +00:00
lds-zero-initializer.ll Refactor backend diagnostics for unsupported features 2016-02-02 13:52:43 +00:00
legalizedag-bug-expand-setcc.ll
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lit.local.cfg
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literals.ll ScheduleDAGInstrs: Rework schedule graph builder. 2015-12-04 01:51:19 +00:00
llvm.AMDGPU.barrier.global.ll
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llvm.AMDGPU.barrier.local.ll
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llvm.AMDGPU.bfe.i32.ll AMDGPU: Add sdst operand to VOP2b instructions 2015-08-29 07:16:50 +00:00
llvm.AMDGPU.bfe.u32.ll
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llvm.AMDGPU.clamp.ll
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llvm.AMDGPU.cube.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
llvm.AMDGPU.cvt_f32_ubyte.ll
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llvm.AMDGPU.flbit.i32.ll
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llvm.AMDGPU.kill.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
llvm.AMDGPU.rsq.clamped.f64.ll AMDGPU/SI: Enable the post-ra scheduler 2016-04-30 00:23:06 +00:00
llvm.AMDGPU.rsq.clamped.ll AMDGPU/SI: Enable the post-ra scheduler 2016-04-30 00:23:06 +00:00
llvm.AMDGPU.rsq.ll AMDGPU: Restore AMDGPU prefixed rsq intrinsic for now 2016-01-26 04:14:16 +00:00
llvm.AMDGPU.tex.ll
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llvm.SI.fs.interp.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
llvm.SI.gather4.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
llvm.SI.getlod.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
llvm.SI.image.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
llvm.SI.image.sample-masked.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
llvm.SI.image.sample.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
llvm.SI.image.sample.o.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
llvm.SI.load.dword.ll AMDGPU/SI: Assembler: Unify parsing/printing of operands. 2016-04-29 09:02:30 +00:00
llvm.SI.packf16.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
llvm.SI.sendmsg-m0.ll [AMDGPU][llvm-mc] Add support for sendmsg(...) syntax. 2016-05-06 17:48:48 +00:00
llvm.SI.sendmsg.ll [AMDGPU][llvm-mc] Add support for sendmsg(...) syntax. 2016-05-06 17:48:48 +00:00
llvm.SI.tbuffer.store.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
llvm.SI.tid.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
llvm.amdgcn.atomic.dec.ll AMDGPU/SI: Assembler: Unify parsing/printing of operands. 2016-04-29 09:02:30 +00:00
llvm.amdgcn.atomic.inc.ll AMDGPU/SI: Assembler: Unify parsing/printing of operands. 2016-04-29 09:02:30 +00:00
llvm.amdgcn.buffer.atomic.ll AMDGPU/SI: Enable the post-ra scheduler 2016-04-30 00:23:06 +00:00
llvm.amdgcn.buffer.load.format.ll AMDGPU/SI: Assembler: Unify parsing/printing of operands. 2016-04-29 09:02:30 +00:00
llvm.amdgcn.buffer.load.ll AMDGPU/SI: Assembler: Unify parsing/printing of operands. 2016-04-29 09:02:30 +00:00
llvm.amdgcn.buffer.store.format.ll AMDGPU/SI: Assembler: Unify parsing/printing of operands. 2016-04-29 09:02:30 +00:00
llvm.amdgcn.buffer.store.ll AMDGPU/SI: Assembler: Unify parsing/printing of operands. 2016-04-29 09:02:30 +00:00
llvm.amdgcn.buffer.wbinvl1.ll AMDGPU: Add cache invalidation instructions. 2015-09-24 19:52:21 +00:00
llvm.amdgcn.buffer.wbinvl1.sc.ll AMDGPU: Add cache invalidation instructions. 2015-09-24 19:52:21 +00:00
llvm.amdgcn.buffer.wbinvl1.vol.ll AMDGPU: Add cache invalidation instructions. 2015-09-24 19:52:21 +00:00
llvm.amdgcn.class.ll AMDGPU/SI: Enable lanemask tracking in misched 2016-03-30 16:35:09 +00:00
llvm.amdgcn.cos.ll AMDGPU: Add intrinsics for sin/cos 2016-02-13 01:19:56 +00:00
llvm.amdgcn.cubeid.ll AMDGPU: Add new amdgcn intrinsics for cube instructions 2016-01-26 04:29:56 +00:00
llvm.amdgcn.cubema.ll AMDGPU: Add new amdgcn intrinsics for cube instructions 2016-01-26 04:29:56 +00:00
llvm.amdgcn.cubesc.ll AMDGPU: Add new amdgcn intrinsics for cube instructions 2016-01-26 04:29:56 +00:00
llvm.amdgcn.cubetc.ll AMDGPU: Add new amdgcn intrinsics for cube instructions 2016-01-26 04:29:56 +00:00
llvm.amdgcn.dispatch.ptr.ll Refactor backend diagnostics for unsupported features 2016-02-02 13:52:43 +00:00
llvm.amdgcn.div.fixup.ll AMDGPU: Rename intrinsics to use amdgcn prefix 2016-01-22 21:30:34 +00:00
llvm.amdgcn.div.fmas.ll AMDGPU: Run SIFoldOperands after PeepholeOptimizer 2016-04-14 21:58:24 +00:00
llvm.amdgcn.div.scale.ll AMDGPU: Add volatile to test loads and stores 2016-04-12 13:38:18 +00:00
llvm.amdgcn.ds.bpermute.ll AMDGPU/SI: Add offset field to ds_permute/ds_bpermute instructions 2016-04-29 14:34:26 +00:00
llvm.amdgcn.ds.permute.ll AMDGPU/SI: Add offset field to ds_permute/ds_bpermute instructions 2016-04-29 14:34:26 +00:00
llvm.amdgcn.frexp.exp.ll AMDGPU: Add frexp_exp intrinsic 2016-03-30 22:28:52 +00:00
llvm.amdgcn.frexp.mant.ll AMDGPU: Add frexp_mant intrinsic 2016-03-21 16:11:05 +00:00
llvm.amdgcn.groupstaticgroup.ll AMDGPU/SI: Implement GroupStaticSize Intrinsic for Dynamic LDS 2016-03-15 17:28:44 +00:00
llvm.amdgcn.image.atomic.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
llvm.amdgcn.image.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
llvm.amdgcn.interp.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
llvm.amdgcn.kernarg.segment.ptr.ll AMDGPU: Add kernarg.segment.ptr intrinsic 2016-04-29 21:16:52 +00:00
llvm.amdgcn.ldexp.ll AMDGPU: Rename intrinsics to use amdgcn prefix 2016-01-22 21:30:34 +00:00
llvm.amdgcn.log.clamp.ll AMDGPU: Add intrinsics for sin/cos 2016-02-13 01:19:56 +00:00
llvm.amdgcn.mbcnt.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
llvm.amdgcn.mov.dpp.ll AMDGPU/SI: Use hazard recognizer to detect DPP hazards 2016-05-02 16:23:09 +00:00
llvm.amdgcn.ps.live.ll AMDGPU/SI: add llvm.amdgcn.ps.live intrinsic 2016-04-22 04:04:08 +00:00
llvm.amdgcn.queue.ptr.ll AMDGPU: Add queue ptr intrinsic 2016-04-25 19:27:18 +00:00
llvm.amdgcn.rcp.ll AMDGPU: Rename intrinsics to use amdgcn prefix 2016-01-22 21:30:34 +00:00
llvm.amdgcn.read.workdim.ll AMDGPU: Rename intrinsics to use amdgcn prefix 2016-01-22 21:30:34 +00:00
llvm.amdgcn.rsq.clamp.ll AMDGPU/SI: Enable the post-ra scheduler 2016-04-30 00:23:06 +00:00
llvm.amdgcn.rsq.ll AMDGPU: Rename intrinsics to use amdgcn prefix 2016-01-22 21:30:34 +00:00
llvm.amdgcn.s.barrier.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
llvm.amdgcn.s.dcache.inv.ll AMDGPU: Add s_dcache_* instructions 2015-09-24 19:52:27 +00:00
llvm.amdgcn.s.dcache.inv.vol.ll AMDGPU: Add s_dcache_* instructions 2015-09-24 19:52:27 +00:00
llvm.amdgcn.s.dcache.wb.ll AMDGPU: Add s_dcache_* instructions 2015-09-24 19:52:27 +00:00
llvm.amdgcn.s.dcache.wb.vol.ll AMDGPU: Add s_dcache_* instructions 2015-09-24 19:52:27 +00:00
llvm.amdgcn.s.getreg.ll [AMDGPU][llvm-mc] s_getreg/setreg* - Support symbolic names of hardware registers. 2016-04-27 15:17:03 +00:00
llvm.amdgcn.s.memrealtime.ll AMDGPU: Implement readcyclecounter 2016-02-27 08:53:46 +00:00
llvm.amdgcn.s.memtime.ll AMDGPU: Implement readcyclecounter 2016-02-27 08:53:46 +00:00
llvm.amdgcn.s.sleep.ll AMDGPU: Add s_sleep intrinsic 2016-02-27 08:53:52 +00:00
llvm.amdgcn.s.waitcnt.ll AMDGPU/SI: Add llvm.amdgcn.s.waitcnt.all intrinsic 2016-04-27 15:46:01 +00:00
llvm.amdgcn.sin.ll AMDGPU: Add intrinsics for sin/cos 2016-02-13 01:19:56 +00:00
llvm.amdgcn.trig.preop.ll AMDGPU: Rename intrinsics to use amdgcn prefix 2016-01-22 21:30:34 +00:00
llvm.amdgcn.workgroup.id.ll [AMDGPU] Assembler: Swap operands of flat_store instructions to match AMD assembler 2016-02-12 17:57:54 +00:00
llvm.amdgcn.workitem.id.ll [AMDGPU] Assembler: Swap operands of flat_store instructions to match AMD assembler 2016-02-12 17:57:54 +00:00
llvm.amdgpu.dp4.ll
…
llvm.amdgpu.kilp.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
llvm.cos.ll AMDGPU: Run r600 tests last 2016-05-05 20:07:37 +00:00
llvm.dbg.value.ll [PR27284] Reverse the ownership between DICompileUnit and DISubprogram. 2016-04-15 15:57:41 +00:00
llvm.exp2.ll
…
llvm.log2.ll
…
llvm.memcpy.ll AMDGPU/SI: Improve MachineSchedModel definition 2016-03-30 16:35:13 +00:00
llvm.pow.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
llvm.r600.read.local.size.ll ScheduleDAGInstrs: Rework schedule graph builder. 2015-12-04 01:51:19 +00:00
llvm.r600.read.workdim.ll AMDGPU: Rename intrinsics to use amdgcn prefix 2016-01-22 21:30:34 +00:00
llvm.rint.f64.ll
…
llvm.rint.ll AMDGPU: Run r600 tests last 2016-05-05 20:07:37 +00:00
llvm.round.f64.ll AMDGPU/SI: Enable the post-ra scheduler 2016-04-30 00:23:06 +00:00
llvm.round.ll AMDGPU/SI: Enable the post-ra scheduler 2016-04-30 00:23:06 +00:00
llvm.sin.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
llvm.sqrt.ll DAGCombiner: Relax sqrt NaN folding check 2016-02-27 09:38:05 +00:00
load-i1.ll
…
load-input-fold.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
load.ll AMDGPU: Run r600 tests last 2016-05-05 20:07:37 +00:00
load.vec.ll
…
load64.ll
…
local-64.ll
…
local-atomics.ll AMDGPU: Add atomic_inc + atomic_dec intrinsics 2016-04-12 14:05:04 +00:00
local-atomics64.ll AMDGPU/SI: Enable lanemask tracking in misched 2016-03-30 16:35:09 +00:00
local-memory-two-objects.ll AMDGPU/SI: Improve MachineSchedModel definition 2016-03-30 16:35:13 +00:00
local-memory.ll AMDGPU: Run r600 tests last 2016-05-05 20:07:37 +00:00
loop-address.ll
…
loop-idiom.ll
…
lower-range-metadata-intrinsic-call.ll [AMDGPU] Assembler: Swap operands of flat_store instructions to match AMD assembler 2016-02-12 17:57:54 +00:00
lshl.ll
…
lshr.ll
…
m0-spill.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
mad-combine.ll AMDGPU/SI: Enable the post-ra scheduler 2016-04-30 00:23:06 +00:00
mad-sub.ll AMDGPU: Add volatile to test loads and stores 2016-04-12 13:38:18 +00:00
mad_int24.ll AMDGPU: Run r600 tests last 2016-05-05 20:07:37 +00:00
mad_uint24.ll AMDGPU: Run r600 tests last 2016-05-05 20:07:37 +00:00
madak.ll AMDGPU/SI: Limit load clustering to 16 bytes instead of 4 instructions 2016-03-28 16:10:13 +00:00
madmk.ll AMDGPU: Run SIFoldOperands after PeepholeOptimizer 2016-04-14 21:58:24 +00:00
max-literals.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
max.ll AMDGPU/SI: Enable lanemask tracking in misched 2016-03-30 16:35:09 +00:00
max3.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
merge-stores.ll AMDGPU/SI: Assembler: Unify parsing/printing of operands. 2016-04-29 09:02:30 +00:00
min.ll AMDGPU/SI: Enable lanemask tracking in misched 2016-03-30 16:35:09 +00:00
min3.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
missing-store.ll AMDGPU/SI: Remove wait state handling for SMRD in SIInsertWaits 2016-04-30 04:04:48 +00:00
move-addr64-rsrc-dead-subreg-writes.ll AMDGPU/SI: Enable the post-ra scheduler 2016-04-30 00:23:06 +00:00
move-to-valu-atomicrmw.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
mubuf.ll AMDGPU/SI: Assembler: Unify parsing/printing of operands. 2016-04-29 09:02:30 +00:00
mul.ll AMDGPU: Run r600 tests last 2016-05-05 20:07:37 +00:00
mul_int24.ll AMDGPU: Run r600 tests last 2016-05-05 20:07:37 +00:00
mul_uint24.ll AMDGPU: Run r600 tests last 2016-05-05 20:07:37 +00:00
mulhu.ll
…
multilevel-break.ll AMDGPU/SI: Fix a mis-compilation of multi-level breaks 2016-04-12 16:10:38 +00:00
no-hsa-graphics-shaders.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
no-initializer-constant-addrspace.ll
…
no-shrink-extloads.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
opencl-image-metadata.ll AMDGPU: Run r600 tests last 2016-05-05 20:07:37 +00:00
operand-folding.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
operand-spacing.ll
…
or.ll ScheduleDAGInstrs: Rework schedule graph builder. 2015-12-04 01:51:19 +00:00
over-max-lds-size.ll AMDGPU: Emit error if too much LDS is used 2016-04-28 19:37:35 +00:00
packetizer.ll
…
parallelandifcollapse.ll
…
parallelorifcollapse.ll
…
partially-dead-super-register-immediate.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
predicate-dp4.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
predicates.ll
…
private-element-size.ll AMDGPU: More bits of frame index are known to be zero 2016-02-27 20:26:57 +00:00
private-memory-atomics.ll AMDGPU: Do not promote allocas with non-inbounds GEPs 2016-02-02 21:16:12 +00:00
private-memory-broken.ll
…
private-memory-r600.ll AMDGPU: Do not promote allocas with non-inbounds GEPs 2016-02-02 21:16:12 +00:00
private-memory.ll AMDGPU: Remove SignBitIsZero for mubuf scratch offsets 2016-03-21 18:02:18 +00:00
promote-alloca-array-allocation.ll AMDGPU: Fix mishandling array allocations when promoting alloca 2016-04-28 18:38:48 +00:00
promote-alloca-bitcast-function.ll Refactor backend diagnostics for unsupported features 2016-02-02 13:52:43 +00:00
promote-alloca-globals.ll AMDGPU: Account for globals in AMDGPUPromoteAlloca pass 2016-04-27 21:05:08 +00:00
promote-alloca-invariant-markers.ll AMDGPU: Fix crash with invariant markers 2016-01-22 19:47:54 +00:00
promote-alloca-mem-intrinsics.ll AMDGPU: Preserve alignments on new created globals 2016-02-05 19:47:23 +00:00
promote-alloca-no-opts.ll AMDGPU: Skip promote alloca with no optimizations 2016-02-02 19:32:42 +00:00
promote-alloca-stored-pointer-value.ll AMDGPU: Insert moves of frame index to value operands 2016-03-23 21:49:25 +00:00
promote-alloca-unhandled-intrinsic.ll AMDGPU: Whitelist handled intrinsics 2016-02-02 19:18:53 +00:00
promote-alloca-volatile.ll AMDGPU: Promote alloca should skip volatiles 2016-03-23 23:17:29 +00:00
pv-packing.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
pv.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
r600-encoding.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
r600-export-fix.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
r600-infinite-loop-bug-while-reorganizing-vector.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
r600cfg.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
rcp-pattern.ll AMDGPU: Rename intrinsics to use amdgcn prefix 2016-01-22 21:30:34 +00:00
read-register-invalid-subtarget.ll AMDGPU: Implement read_register and write_register intrinsics 2016-01-26 04:29:24 +00:00
read-register-invalid-type-i32.ll AMDGPU: Implement read_register and write_register intrinsics 2016-01-26 04:29:24 +00:00
read-register-invalid-type-i64.ll AMDGPU: Implement read_register and write_register intrinsics 2016-01-26 04:29:24 +00:00
read_register.ll AMDGPU: Implement read_register and write_register intrinsics 2016-01-26 04:29:24 +00:00
readcyclecounter.ll AMDGPU: Implement readcyclecounter 2016-02-27 08:53:46 +00:00
reciprocal.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
reduce-load-width-alignment.ll AMDGPU/SI: Assembler: Unify parsing/printing of operands. 2016-04-29 09:02:30 +00:00
reduce-store-width-alignment.ll DAGCombiner: Relax alignment restriction when changing store type 2016-04-22 21:01:41 +00:00
reg-coalescer-sched-crash.ll RegisterCoalescer: Remap subregister lanemasks before exchanging operands 2016-03-05 04:36:13 +00:00
register-count-comments.ll AMDGPU/SI: Use flat for global load/store when targeting HSA 2015-12-22 20:55:23 +00:00
reorder-stores.ll AMDGPU: Make v2i64/v2f64 legal types. 2015-11-25 19:58:34 +00:00
ret.ll AMDGPU/SI: Add latency for export instructions 2016-04-07 18:30:05 +00:00
ret_jump.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
rotl.i64.ll
…
rotl.ll AMDGPU: Run r600 tests last 2016-05-05 20:07:37 +00:00
rotr.i64.ll
…
rotr.ll
…
rsq.ll AMDGPU: Add volatile to test loads and stores 2016-04-12 13:38:18 +00:00
rv7x0_count3.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
s_addk_i32.ll AMDGPU: Use s_addk_i32 / s_mulk_i32 2016-04-16 01:46:49 +00:00
s_movk_i32.ll AMDGPU: Reduce number of copies emitted 2015-09-24 07:16:37 +00:00
s_mulk_i32.ll AMDGPU: Use s_addk_i32 / s_mulk_i32 2016-04-16 01:46:49 +00:00
saddo.ll
…
salu-to-valu.ll AMDGPU/SI: Remove wait state handling for SMRD in SIInsertWaits 2016-04-30 04:04:48 +00:00
sampler-resource-id.ll AMDGPU: Add pass to lower OpenCL image and sampler arguments. 2015-08-07 23:19:30 +00:00
scalar_to_vector.ll
…
schedule-fs-loop-nested-if.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
schedule-fs-loop-nested.ll AMDGPU: Replace some deprecated intrinsic uses in tests 2016-01-23 05:42:49 +00:00
schedule-fs-loop.ll AMDGPU: Replace some deprecated intrinsic uses in tests 2016-01-23 05:42:49 +00:00
schedule-global-loads.ll AMDGPU/SI: Assembler: Unify parsing/printing of operands. 2016-04-29 09:02:30 +00:00
schedule-if-2.ll
…
schedule-if.ll
…
schedule-kernel-arg-loads.ll AMDGPU/SI: Use the hazard recognizer to break SMEM soft clauses 2016-05-02 17:39:06 +00:00
schedule-vs-if-nested-loop-failure.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
schedule-vs-if-nested-loop.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
scratch-buffer.ll AMDGPU: Remove SignBitIsZero for mubuf scratch offsets 2016-03-21 18:02:18 +00:00
sdiv.ll
…
sdivrem24.ll
…
sdivrem64.ll AMDGPU: Fold bitcasts of scalar constants to vectors 2016-04-14 21:58:07 +00:00
select-i1.ll
…
select-vectors.ll AMDGPU/SI: Add support for shrinking v_cndmask_b32_e32 instructions 2015-07-14 14:15:03 +00:00
select.ll
…
select64.ll AMDGPU/SI: Fold operands through REG_SEQUENCE instructions 2015-09-09 15:43:26 +00:00
selectcc-cnd.ll
…
selectcc-cnde-int.ll
…
selectcc-icmp-select-float.ll
…
selectcc-opt.ll
…
selectcc.ll
…
set-dx10.ll ScheduleDAGInstrs: Rework schedule graph builder. 2015-12-04 01:51:19 +00:00
setcc-equivalent.ll
…
setcc-opt.ll AMDGPU/SI: Enable the post-ra scheduler 2016-04-30 00:23:06 +00:00
setcc.ll AMDGPU: Run r600 tests last 2016-05-05 20:07:37 +00:00
setcc64.ll AMDGPU/SI: Enable lanemask tracking in misched 2016-03-30 16:35:09 +00:00
seto.ll
…
setuo.ll
…
sext-eliminate.ll
…
sext-in-reg.ll AMDGPU: Remove min/max intrinsics 2016-01-20 20:50:19 +00:00
sgpr-control-flow.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
sgpr-copy-duplicate-operand.ll
…
sgpr-copy.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
shared-op-cycle.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
shift-and-i64-ubfe.ll AMDGPU/SI: Enable the post-ra scheduler 2016-04-30 00:23:06 +00:00
shift-and-i128-ubfe.ll AMDGPU: Make i64 loads/stores promote to v2i32 2016-05-02 20:07:26 +00:00
shift-i64-opts.ll AMDGPU/SI: Enable the post-ra scheduler 2016-04-30 00:23:06 +00:00
shl.ll AMDGPU: Run r600 tests last 2016-05-05 20:07:37 +00:00
shl_add_constant.ll AMDGPU: Use s_addk_i32 / s_mulk_i32 2016-04-16 01:46:49 +00:00
shl_add_ptr.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
si-annotate-cf-assertion.ll
…
si-annotate-cf.ll AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions 2016-02-12 23:45:29 +00:00
si-annotate-cfg-loop-assert.ll AMDGPU/SI: Annotate Loops with Constant Condition in SIAnnotateControlFlow pass. 2016-02-12 17:11:04 +00:00
si-instr-info-correct-implicit-operands.ll AMDGPU: Run SIFoldOperands after PeepholeOptimizer 2016-04-14 21:58:24 +00:00
si-literal-folding.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
si-lod-bias.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
si-lower-control-flow-unreachable-block.ll AMDGPU: Fix crash with unreachable terminators. 2016-04-29 21:52:13 +00:00
si-scheduler.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
si-sgpr-spill.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
si-spill-cf.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
si-spill-sgpr-stack.ll AMDGPU/SI: Use v_readfirstlane_b32 when restoring SGPRs spilled to scratch 2016-05-02 20:11:44 +00:00
si-triv-disjoint-mem-access.ll AMDGPU/SI: Enable the post-ra scheduler 2016-04-30 00:23:06 +00:00
si-vector-hang.ll
…
sign_extend.ll AMDGPU: sext_inreg (srl x, K), vt -> bfe x, K, vt.Size 2016-04-22 22:59:16 +00:00
simplify-demanded-bits-build-pair.ll
…
sint_to_fp.f64.ll AMDGPU: Run SIFoldOperands after PeepholeOptimizer 2016-04-14 21:58:24 +00:00
sint_to_fp.i64.ll [AMDGPU] Assembler: Swap operands of flat_store instructions to match AMD assembler 2016-02-12 17:57:54 +00:00
sint_to_fp.ll [AMDGPU] Assembler: Swap operands of flat_store instructions to match AMD assembler 2016-02-12 17:57:54 +00:00
smed3.ll AMDGPU: Match more med3 integer patterns 2016-03-07 21:54:48 +00:00
sminmax.ll AMDGPU: add llvm.amdgcn.buffer.load/store intrinsics 2016-04-12 21:18:10 +00:00
smrd-vccz-bug.ll AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions 2016-02-12 23:45:29 +00:00
smrd.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
spill-alloc-sgpr-init-bug.ll AMDGPU/SI: Do not move scratch resource register on Tonga & Iceland 2016-01-05 20:42:49 +00:00
spill-scavenge-offset.ll AMDGPU: Quick fix for extreme slowness in spill-scavenge-offset.ll test 2016-02-12 00:05:34 +00:00
split-scalar-i64-add.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
split-smrd.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
split-vector-memoperand-offsets.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
sra.ll AMDGPU: Run SIFoldOperands after PeepholeOptimizer 2016-04-14 21:58:24 +00:00
srem.ll
…
srl.ll ScheduleDAGInstrs: Rework schedule graph builder. 2015-12-04 01:51:19 +00:00
ssubo.ll
…
store-barrier.ll [LLVM] Remove unwanted --check-prefix=CHECK from unit tests. NFC. 2016-04-19 23:51:52 +00:00
store-v3i32.ll
…
store-v3i64.ll
…
store-vector-ptrs.ll
…
store.ll AMDGPU/R600: Implement allowsMisalignedMemoryAccess 2016-02-22 21:04:16 +00:00
store.r600.ll
…
store_typed.ll AMDGPU: Add MEM_RAT STORE_TYPED. 2015-10-01 17:51:34 +00:00
structurize.ll
…
structurize1.ll
…
sub.ll AMDGPU: Add sdst operand to VOP2b instructions 2015-08-29 07:16:50 +00:00
subreg-coalescer-crash.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
subreg-coalescer-undef-use.ll AMDGPU/SI: Enable the post-ra scheduler 2016-04-30 00:23:06 +00:00
subreg-eliminate-dead.ll
…
swizzle-export.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
tex-clause-antidep.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
texture-input-merge.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
trunc-bitcast-vector.ll DAGCombiner: Turn truncate of a bitcasted vector to an extract 2016-03-01 21:31:53 +00:00
trunc-cmp-constant.ll AMDGPU/SI: Enable lanemask tracking in misched 2016-03-30 16:35:09 +00:00
trunc-store-f64-to-f16.ll
…
trunc-store-i1.ll
…
trunc-store.ll AMDGPU: Fix v16i32 to v16i8 truncstore 2015-07-31 04:12:04 +00:00
trunc-vector-store-assertion-failure.ll
…
trunc.ll AMDGPU/SI: Enable the post-ra scheduler 2016-04-30 00:23:06 +00:00
tti-unroll-prefs.ll
…
uaddo.ll
…
udiv.ll AMDGPU: Run r600 tests last 2016-05-05 20:07:37 +00:00
udivrem.ll AMDGPU/SI: Improve MachineSchedModel definition 2016-03-30 16:35:13 +00:00
udivrem24.ll
…
udivrem64.ll
…
uint_to_fp.f64.ll AMDGPU: Run SIFoldOperands after PeepholeOptimizer 2016-04-14 21:58:24 +00:00
uint_to_fp.i64.ll [AMDGPU] Assembler: Swap operands of flat_store instructions to match AMD assembler 2016-02-12 17:57:54 +00:00
uint_to_fp.ll [AMDGPU] Assembler: Swap operands of flat_store instructions to match AMD assembler 2016-02-12 17:57:54 +00:00
umed3.ll AMDGPU: Match more med3 integer patterns 2016-03-07 21:54:48 +00:00
unaligned-load-store.ll AMDGPU: Custom lower v2i32 loads and stores 2016-05-02 20:13:51 +00:00
unhandled-loop-condition-assertion.ll
…
uniform-branch-intrinsic-cond.ll AMDGPU: Uniform branch conditions can originate with intrinsics 2016-05-05 17:36:36 +00:00
uniform-cfg.ll AMDGPU/SI: Enable the post-ra scheduler 2016-04-30 00:23:06 +00:00
uniform-crash.ll AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions 2016-02-12 23:45:29 +00:00
uniform-loop-inside-nonuniform.ll [LLVM] Remove unwanted --check-prefix=CHECK from unit tests. NFC. 2016-04-19 23:51:52 +00:00
unroll.ll
…
unsupported-cc.ll ScheduleDAGInstrs: Rework schedule graph builder. 2015-12-04 01:51:19 +00:00
urecip.ll
…
urem.ll
…
use-sgpr-multiple-times.ll AMDGPU: Run SIFoldOperands after PeepholeOptimizer 2016-04-14 21:58:24 +00:00
usubo.ll
…
v1i64-kernel-arg.ll
…
v_cndmask.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
v_mac.ll AMDGPU/SI: Assembler: Unify parsing/printing of operands. 2016-04-29 09:02:30 +00:00
valu-i1.ll RegisterPressure: Fix default lanemask for missing regunit intervals 2016-04-29 02:44:54 +00:00
vector-alloca.ll AMDGPU: Run r600 tests last 2016-05-05 20:07:37 +00:00
vertex-fetch-encoding.ll
…
vgpr-spill-emergency-stack-slot-compute.ll AMDGPU/SI: Enable the post-ra scheduler 2016-04-30 00:23:06 +00:00
vgpr-spill-emergency-stack-slot.ll AMDGPU/SI: Enable the post-ra scheduler 2016-04-30 00:23:06 +00:00
vop-shrink.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
vselect.ll AMDGPU: Run r600 tests last 2016-05-05 20:07:37 +00:00
vselect64.ll
…
vtx-fetch-branch.ll
…
vtx-schedule.ll
…
wait.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
waitcnt-flat.ll AMDGPU/SI: Fix s_waitcnt insertion for flat instructions 2016-02-19 15:33:13 +00:00
work-item-intrinsics.ll AMDGPU: Add new amdgcn workitem intrinsics 2016-01-30 04:25:19 +00:00
wqm.ll AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
write-register-vgpr-into-sgpr.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
write_register.ll AMDGPU: Implement read_register and write_register intrinsics 2016-01-26 04:29:24 +00:00
wrong-transalu-pos-fix.ll
…
xor.ll ScheduleDAGInstrs: Rework schedule graph builder. 2015-12-04 01:51:19 +00:00
zero_extend.ll AMDGPU: Run r600 tests last 2016-05-05 20:07:37 +00:00
zext-i64-bit-operand.ll AMDGPU: Eliminate half of i64 or if one operand is zero_extend from i32 2016-04-12 18:24:38 +00:00

README 

+==============================================================================+
| How to organize the lit tests                                                |
+==============================================================================+

- If you write a test for matching a single DAG opcode or intrinsic, it should
  go in a file called {opcode_name,intrinsic_name}.ll (e.g. fadd.ll)

- If you write a test that matches several DAG opcodes and checks for a single
  ISA instruction, then that test should go in a file called {ISA_name}.ll (e.g.
  bfi_int.ll

- For all other tests, use your best judgement for organizing tests and naming
  the files.

+==============================================================================+
| Naming conventions                                                           |
+==============================================================================+

- Use dash '-' and not underscore '_' to separate words in file names, unless
  the file is named after a DAG opcode or ISA instruction that has an
  underscore '_' in its name.