llvm-project/llvm/test/TableGen
Krzysztof Parzyszek 779d98e1c0 TableGen support for parameterized register class information
This replaces TableGen's type inference to operate on parameterized
types instead of MVTs, and as a consequence, some interfaces have
changed:
- Uses of MVTs are replaced by ValueTypeByHwMode.
- EEVT::TypeSet is replaced by TypeSetByHwMode.

This affects the way that types and type sets are printed, and the
tests relying on that have been updated.

There are certain users of the inferred types outside of TableGen
itself, namely FastISel and GlobalISel. For those users, the way
that the types are accessed have changed. For typical scenarios,
these replacements can be used:
- TreePatternNode::getType(ResNo) -> getSimpleType(ResNo)
- TreePatternNode::hasTypeSet(ResNo) -> hasConcreteType(ResNo)
- TypeSet::isConcrete -> TypeSetByHwMode::isValueTypeByHwMode(false)

For more information, please refer to the review page.

Differential Revision: https://reviews.llvm.org/D31951

llvm-svn: 313271
2017-09-14 16:56:21 +00:00
..
2003-08-03-PassCode.td
2006-09-18-LargeInt.td
2010-03-24-PrematureDefaults.td
AnonDefinitionOnDemand.td
AsmPredicateCondsEmission.td Use std::bitset for SubtargetFeatures. 2015-05-26 10:47:10 +00:00
AsmVariant.td [TableGen] Add a proper namespace to an Instruction in an AsmMatcher test. This is required after r307358. 2017-07-07 05:50:45 +00:00
BitOffsetDecoder.td
BitsInit.td
BitsInitOverflow.td
CStyleComment.td
ClassInstanceValue.td
ConcatenatedSubregs.td Address r311914 review comments 2017-08-28 20:11:27 +00:00
Dag.td
DefmInherit.td
DefmInsideMultiClass.td
DuplicateFieldValues.td [tablegen] Delete duplicates from a vector without skipping elements 2016-12-01 19:38:50 +00:00
FieldAccess.td
ForeachList.td
ForeachLoop.td
ForwardRef.td
GeneralList.td
GlobalISelEmitter.td TableGen support for parameterized register class information 2017-09-14 16:56:21 +00:00
HwModeSelect.td TableGen support for parameterized register class information 2017-09-14 16:56:21 +00:00
Include.inc
Include.td
IntBitInit.td
LazyChange.td
LetInsideMultiClasses.td
ListArgs.td
ListArgsSimple.td
ListConversion.td
ListManip.td
ListOfList.td
ListSlices.td
LoLoL.td
MultiClass.td
MultiClassDefName.td [TableGen] Resolve complex def names inside multiclasses 2015-05-21 04:32:56 +00:00
MultiClassInherit.td
MultiPat.td
NestedForeach.td
Paste.td
RegisterBankEmitter.td TableGen: Fix infinite recursion in RegisterBankEmitter 2017-01-30 15:07:01 +00:00
RegisterEncoder.td [TableGen] Add EncoderMethod to RegisterOperand 2017-05-15 10:13:07 +00:00
SetTheory.td
SiblingForeach.td
Slice.td
String.td
SuperSubclassSameName.td
TargetInstrInfo.td
TargetInstrSpec.td
TemplateArgRename.td
Tree.td
TreeNames.td
TwoLevelName.td Add test cases that will show the bug that was fixed in r256725. 2016-01-13 07:53:11 +00:00
UnsetBitInit.td
UnterminatedComment.td Make shell redirection construct portable 2017-07-12 13:24:46 +00:00
ValidIdentifiers.td
cast-list-initializer.td TableGen: Support folding casts from bits to int 2015-07-31 01:12:06 +00:00
cast.td
defmclass.td
eq.td
eqbit.td
foreach.td
if-empty-list-arg.td
if.td
ifbit.td
intrinsic-long-name.td [MVT][SVE] Scalable vector MVTs (2/3) 2017-04-20 13:36:58 +00:00
intrinsic-varargs.td [MVT] add v1i1 MVT 2017-05-18 11:29:41 +00:00
lisp.td
list-element-bitref.td
listconcat.td
lit.local.cfg
math.td TableGen: Add operator !or 2016-11-15 06:49:28 +00:00
nested-comment.td
pr8330.td
strconcat.td
subst.td
subst2.td
trydecode-emission.td tests: accept different TargetOpcode values. 2016-07-07 17:51:42 +00:00
trydecode-emission2.td tests: accept different TargetOpcode values. 2016-07-07 17:51:42 +00:00
trydecode-emission3.td tests: accept different TargetOpcode values. 2016-07-07 17:51:42 +00:00
usevalname.td