forked from OSchip/llvm-project
423 lines
12 KiB
C++
423 lines
12 KiB
C++
//===- CSEInfo.cpp ------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/GlobalISel/CSEInfo.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/InitializePasses.h"
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#define DEBUG_TYPE "cseinfo"
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using namespace llvm;
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char llvm::GISelCSEAnalysisWrapperPass::ID = 0;
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GISelCSEAnalysisWrapperPass::GISelCSEAnalysisWrapperPass()
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: MachineFunctionPass(ID) {
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initializeGISelCSEAnalysisWrapperPassPass(*PassRegistry::getPassRegistry());
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}
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INITIALIZE_PASS_BEGIN(GISelCSEAnalysisWrapperPass, DEBUG_TYPE,
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"Analysis containing CSE Info", false, true)
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INITIALIZE_PASS_END(GISelCSEAnalysisWrapperPass, DEBUG_TYPE,
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"Analysis containing CSE Info", false, true)
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/// -------- UniqueMachineInstr -------------//
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void UniqueMachineInstr::Profile(FoldingSetNodeID &ID) {
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GISelInstProfileBuilder(ID, MI->getMF()->getRegInfo()).addNodeID(MI);
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}
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/// -----------------------------------------
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/// --------- CSEConfigFull ---------- ///
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bool CSEConfigFull::shouldCSEOpc(unsigned Opc) {
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switch (Opc) {
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default:
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break;
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case TargetOpcode::G_ADD:
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case TargetOpcode::G_AND:
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case TargetOpcode::G_ASHR:
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case TargetOpcode::G_LSHR:
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case TargetOpcode::G_MUL:
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case TargetOpcode::G_OR:
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case TargetOpcode::G_SHL:
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case TargetOpcode::G_SUB:
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case TargetOpcode::G_XOR:
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case TargetOpcode::G_UDIV:
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case TargetOpcode::G_SDIV:
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case TargetOpcode::G_UREM:
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case TargetOpcode::G_SREM:
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case TargetOpcode::G_CONSTANT:
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case TargetOpcode::G_FCONSTANT:
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case TargetOpcode::G_IMPLICIT_DEF:
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case TargetOpcode::G_ZEXT:
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case TargetOpcode::G_SEXT:
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case TargetOpcode::G_ANYEXT:
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case TargetOpcode::G_UNMERGE_VALUES:
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case TargetOpcode::G_TRUNC:
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case TargetOpcode::G_PTR_ADD:
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return true;
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}
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return false;
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}
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bool CSEConfigConstantOnly::shouldCSEOpc(unsigned Opc) {
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return Opc == TargetOpcode::G_CONSTANT || Opc == TargetOpcode::G_IMPLICIT_DEF;
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}
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std::unique_ptr<CSEConfigBase>
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llvm::getStandardCSEConfigForOpt(CodeGenOpt::Level Level) {
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std::unique_ptr<CSEConfigBase> Config;
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if (Level == CodeGenOpt::None)
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Config = std::make_unique<CSEConfigConstantOnly>();
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else
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Config = std::make_unique<CSEConfigFull>();
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return Config;
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}
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/// -----------------------------------------
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/// -------- GISelCSEInfo -------------//
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void GISelCSEInfo::setMF(MachineFunction &MF) {
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this->MF = &MF;
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this->MRI = &MF.getRegInfo();
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}
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GISelCSEInfo::~GISelCSEInfo() {}
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bool GISelCSEInfo::isUniqueMachineInstValid(
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const UniqueMachineInstr &UMI) const {
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// Should we check here and assert that the instruction has been fully
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// constructed?
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// FIXME: Any other checks required to be done here? Remove this method if
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// none.
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return true;
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}
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void GISelCSEInfo::invalidateUniqueMachineInstr(UniqueMachineInstr *UMI) {
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bool Removed = CSEMap.RemoveNode(UMI);
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(void)Removed;
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assert(Removed && "Invalidation called on invalid UMI");
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// FIXME: Should UMI be deallocated/destroyed?
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}
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UniqueMachineInstr *GISelCSEInfo::getNodeIfExists(FoldingSetNodeID &ID,
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MachineBasicBlock *MBB,
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void *&InsertPos) {
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auto *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
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if (Node) {
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if (!isUniqueMachineInstValid(*Node)) {
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invalidateUniqueMachineInstr(Node);
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return nullptr;
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}
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if (Node->MI->getParent() != MBB)
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return nullptr;
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}
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return Node;
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}
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void GISelCSEInfo::insertNode(UniqueMachineInstr *UMI, void *InsertPos) {
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handleRecordedInsts();
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assert(UMI);
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UniqueMachineInstr *MaybeNewNode = UMI;
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if (InsertPos)
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CSEMap.InsertNode(UMI, InsertPos);
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else
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MaybeNewNode = CSEMap.GetOrInsertNode(UMI);
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if (MaybeNewNode != UMI) {
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// A similar node exists in the folding set. Let's ignore this one.
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return;
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}
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assert(InstrMapping.count(UMI->MI) == 0 &&
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"This instruction should not be in the map");
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InstrMapping[UMI->MI] = MaybeNewNode;
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}
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UniqueMachineInstr *GISelCSEInfo::getUniqueInstrForMI(const MachineInstr *MI) {
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assert(shouldCSE(MI->getOpcode()) && "Trying to CSE an unsupported Node");
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auto *Node = new (UniqueInstrAllocator) UniqueMachineInstr(MI);
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return Node;
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}
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void GISelCSEInfo::insertInstr(MachineInstr *MI, void *InsertPos) {
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assert(MI);
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// If it exists in temporary insts, remove it.
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TemporaryInsts.remove(MI);
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auto *Node = getUniqueInstrForMI(MI);
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insertNode(Node, InsertPos);
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}
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MachineInstr *GISelCSEInfo::getMachineInstrIfExists(FoldingSetNodeID &ID,
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MachineBasicBlock *MBB,
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void *&InsertPos) {
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handleRecordedInsts();
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if (auto *Inst = getNodeIfExists(ID, MBB, InsertPos)) {
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LLVM_DEBUG(dbgs() << "CSEInfo::Found Instr " << *Inst->MI;);
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return const_cast<MachineInstr *>(Inst->MI);
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}
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return nullptr;
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}
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void GISelCSEInfo::countOpcodeHit(unsigned Opc) {
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#ifndef NDEBUG
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if (OpcodeHitTable.count(Opc))
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OpcodeHitTable[Opc] += 1;
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else
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OpcodeHitTable[Opc] = 1;
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#endif
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// Else do nothing.
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}
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void GISelCSEInfo::recordNewInstruction(MachineInstr *MI) {
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if (shouldCSE(MI->getOpcode())) {
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TemporaryInsts.insert(MI);
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LLVM_DEBUG(dbgs() << "CSEInfo::Recording new MI " << *MI);
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}
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}
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void GISelCSEInfo::handleRecordedInst(MachineInstr *MI) {
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assert(shouldCSE(MI->getOpcode()) && "Invalid instruction for CSE");
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auto *UMI = InstrMapping.lookup(MI);
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LLVM_DEBUG(dbgs() << "CSEInfo::Handling recorded MI " << *MI);
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if (UMI) {
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// Invalidate this MI.
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invalidateUniqueMachineInstr(UMI);
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InstrMapping.erase(MI);
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}
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/// Now insert the new instruction.
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if (UMI) {
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/// We'll reuse the same UniqueMachineInstr to avoid the new
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/// allocation.
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*UMI = UniqueMachineInstr(MI);
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insertNode(UMI, nullptr);
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} else {
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/// This is a new instruction. Allocate a new UniqueMachineInstr and
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/// Insert.
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insertInstr(MI);
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}
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}
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void GISelCSEInfo::handleRemoveInst(MachineInstr *MI) {
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if (auto *UMI = InstrMapping.lookup(MI)) {
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invalidateUniqueMachineInstr(UMI);
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InstrMapping.erase(MI);
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}
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TemporaryInsts.remove(MI);
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}
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void GISelCSEInfo::handleRecordedInsts() {
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while (!TemporaryInsts.empty()) {
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auto *MI = TemporaryInsts.pop_back_val();
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handleRecordedInst(MI);
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}
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}
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bool GISelCSEInfo::shouldCSE(unsigned Opc) const {
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// Only GISel opcodes are CSEable
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if (!isPreISelGenericOpcode(Opc))
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return false;
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assert(CSEOpt.get() && "CSEConfig not set");
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return CSEOpt->shouldCSEOpc(Opc);
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}
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void GISelCSEInfo::erasingInstr(MachineInstr &MI) { handleRemoveInst(&MI); }
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void GISelCSEInfo::createdInstr(MachineInstr &MI) { recordNewInstruction(&MI); }
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void GISelCSEInfo::changingInstr(MachineInstr &MI) {
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// For now, perform erase, followed by insert.
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erasingInstr(MI);
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createdInstr(MI);
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}
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void GISelCSEInfo::changedInstr(MachineInstr &MI) { changingInstr(MI); }
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void GISelCSEInfo::analyze(MachineFunction &MF) {
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setMF(MF);
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for (auto &MBB : MF) {
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if (MBB.empty())
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continue;
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for (MachineInstr &MI : MBB) {
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if (!shouldCSE(MI.getOpcode()))
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continue;
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LLVM_DEBUG(dbgs() << "CSEInfo::Add MI: " << MI);
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insertInstr(&MI);
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}
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}
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}
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void GISelCSEInfo::releaseMemory() {
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print();
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CSEMap.clear();
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InstrMapping.clear();
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UniqueInstrAllocator.Reset();
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TemporaryInsts.clear();
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CSEOpt.reset();
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MRI = nullptr;
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MF = nullptr;
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#ifndef NDEBUG
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OpcodeHitTable.clear();
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#endif
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}
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Error GISelCSEInfo::verify() {
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#ifndef NDEBUG
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handleRecordedInsts();
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// For each instruction in map from MI -> UMI,
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// Profile(MI) and make sure UMI is found for that profile.
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for (auto &It : InstrMapping) {
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FoldingSetNodeID TmpID;
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GISelInstProfileBuilder(TmpID, *MRI).addNodeID(It.first);
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void *InsertPos;
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UniqueMachineInstr *FoundNode =
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CSEMap.FindNodeOrInsertPos(TmpID, InsertPos);
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if (FoundNode != It.second)
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return createStringError(std::errc::not_supported,
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"CSEMap mismatch, InstrMapping has MIs without "
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"corresponding Nodes in CSEMap");
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}
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// For every node in the CSEMap, make sure that the InstrMapping
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// points to it.
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for (auto It = CSEMap.begin(), End = CSEMap.end(); It != End; ++It) {
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const UniqueMachineInstr &UMI = *It;
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if (!InstrMapping.count(UMI.MI))
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return createStringError(std::errc::not_supported,
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"Node in CSE without InstrMapping", UMI.MI);
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if (InstrMapping[UMI.MI] != &UMI)
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return createStringError(std::make_error_code(std::errc::not_supported),
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"Mismatch in CSE mapping");
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}
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#endif
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return Error::success();
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}
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void GISelCSEInfo::print() {
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LLVM_DEBUG(for (auto &It
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: OpcodeHitTable) {
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dbgs() << "CSEInfo::CSE Hit for Opc " << It.first << " : " << It.second
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<< "\n";
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};);
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}
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/// -----------------------------------------
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// ---- Profiling methods for FoldingSetNode --- //
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const GISelInstProfileBuilder &
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GISelInstProfileBuilder::addNodeID(const MachineInstr *MI) const {
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addNodeIDMBB(MI->getParent());
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addNodeIDOpcode(MI->getOpcode());
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for (auto &Op : MI->operands())
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addNodeIDMachineOperand(Op);
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addNodeIDFlag(MI->getFlags());
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return *this;
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}
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const GISelInstProfileBuilder &
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GISelInstProfileBuilder::addNodeIDOpcode(unsigned Opc) const {
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ID.AddInteger(Opc);
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return *this;
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}
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const GISelInstProfileBuilder &
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GISelInstProfileBuilder::addNodeIDRegType(const LLT Ty) const {
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uint64_t Val = Ty.getUniqueRAWLLTData();
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ID.AddInteger(Val);
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return *this;
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}
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const GISelInstProfileBuilder &
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GISelInstProfileBuilder::addNodeIDRegType(const TargetRegisterClass *RC) const {
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ID.AddPointer(RC);
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return *this;
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}
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const GISelInstProfileBuilder &
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GISelInstProfileBuilder::addNodeIDRegType(const RegisterBank *RB) const {
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ID.AddPointer(RB);
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return *this;
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}
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const GISelInstProfileBuilder &
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GISelInstProfileBuilder::addNodeIDImmediate(int64_t Imm) const {
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ID.AddInteger(Imm);
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return *this;
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}
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const GISelInstProfileBuilder &
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GISelInstProfileBuilder::addNodeIDRegNum(unsigned Reg) const {
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ID.AddInteger(Reg);
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return *this;
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}
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const GISelInstProfileBuilder &
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GISelInstProfileBuilder::addNodeIDRegType(const unsigned Reg) const {
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addNodeIDMachineOperand(MachineOperand::CreateReg(Reg, false));
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return *this;
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}
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const GISelInstProfileBuilder &
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GISelInstProfileBuilder::addNodeIDMBB(const MachineBasicBlock *MBB) const {
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ID.AddPointer(MBB);
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return *this;
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}
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const GISelInstProfileBuilder &
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GISelInstProfileBuilder::addNodeIDFlag(unsigned Flag) const {
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if (Flag)
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ID.AddInteger(Flag);
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return *this;
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}
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const GISelInstProfileBuilder &GISelInstProfileBuilder::addNodeIDMachineOperand(
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const MachineOperand &MO) const {
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if (MO.isReg()) {
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Register Reg = MO.getReg();
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if (!MO.isDef())
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addNodeIDRegNum(Reg);
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LLT Ty = MRI.getType(Reg);
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if (Ty.isValid())
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addNodeIDRegType(Ty);
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auto *RB = MRI.getRegBankOrNull(Reg);
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if (RB)
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addNodeIDRegType(RB);
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auto *RC = MRI.getRegClassOrNull(Reg);
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if (RC)
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addNodeIDRegType(RC);
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assert(!MO.isImplicit() && "Unhandled case");
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} else if (MO.isImm())
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ID.AddInteger(MO.getImm());
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else if (MO.isCImm())
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ID.AddPointer(MO.getCImm());
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else if (MO.isFPImm())
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ID.AddPointer(MO.getFPImm());
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else if (MO.isPredicate())
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ID.AddInteger(MO.getPredicate());
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else
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llvm_unreachable("Unhandled operand type");
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// Handle other types
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return *this;
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}
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GISelCSEInfo &
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GISelCSEAnalysisWrapper::get(std::unique_ptr<CSEConfigBase> CSEOpt,
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bool Recompute) {
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if (!AlreadyComputed || Recompute) {
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Info.releaseMemory();
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Info.setCSEConfig(std::move(CSEOpt));
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Info.analyze(*MF);
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AlreadyComputed = true;
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}
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return Info;
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}
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void GISelCSEAnalysisWrapperPass::getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesAll();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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bool GISelCSEAnalysisWrapperPass::runOnMachineFunction(MachineFunction &MF) {
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releaseMemory();
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Wrapper.setMF(MF);
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return false;
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}
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