forked from OSchip/llvm-project
175 lines
6.8 KiB
LLVM
175 lines
6.8 KiB
LLVM
; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=SI -check-prefix=FUNC %s
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declare i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
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; FUNC-LABEL {{^}}sextload_i1_to_i32_trunc_cmp_eq_0:
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; SI: buffer_load_ubyte [[LOAD:v[0-9]+]]
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; SI: v_and_b32_e32 [[TMP:v[0-9]+]], 1, [[LOAD]]
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; SI: v_cmp_eq_u32_e32 vcc, 0, [[TMP]]{{$}}
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; SI: v_cndmask_b32_e64
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; SI: buffer_store_byte
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define amdgpu_kernel void @sextload_i1_to_i32_trunc_cmp_eq_0(i1 addrspace(1)* %out, i1 addrspace(1)* %in) nounwind {
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%load = load i1, i1 addrspace(1)* %in
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%ext = sext i1 %load to i32
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%cmp = icmp eq i32 %ext, 0
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store i1 %cmp, i1 addrspace(1)* %out
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ret void
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}
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; FIXME: The negate should be inverting the compare.
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; FUNC-LABEL: {{^}}zextload_i1_to_i32_trunc_cmp_eq_0:
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; SI: buffer_load_ubyte [[LOAD:v[0-9]+]]
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; SI: v_and_b32_e32 [[TMP:v[0-9]+]], 1, [[LOAD]]
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; SI: v_cmp_eq_u32_e32 vcc, 1, [[TMP]]{{$}}
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; SI-NEXT: s_xor_b64 [[NEG:s\[[0-9]+:[0-9]+\]]], vcc, -1
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; SI-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, 1, [[NEG]]
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; SI: buffer_store_byte [[RESULT]]
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define amdgpu_kernel void @zextload_i1_to_i32_trunc_cmp_eq_0(i1 addrspace(1)* %out, i1 addrspace(1)* %in) nounwind {
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%load = load i1, i1 addrspace(1)* %in
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%ext = zext i1 %load to i32
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%cmp = icmp eq i32 %ext, 0
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store i1 %cmp, i1 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}sextload_i1_to_i32_trunc_cmp_eq_1:
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; SI: v_mov_b32_e32 [[RESULT:v[0-9]+]], 0{{$}}
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; SI: buffer_store_byte [[RESULT]]
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define amdgpu_kernel void @sextload_i1_to_i32_trunc_cmp_eq_1(i1 addrspace(1)* %out, i1 addrspace(1)* %in) nounwind {
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%load = load i1, i1 addrspace(1)* %in
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%ext = sext i1 %load to i32
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%cmp = icmp eq i32 %ext, 1
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store i1 %cmp, i1 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}zextload_i1_to_i32_trunc_cmp_eq_1:
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; SI: buffer_load_ubyte [[LOAD:v[0-9]+]]
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; SI: v_and_b32_e32 [[RESULT:v[0-9]+]], 1, [[LOAD]]
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; SI: buffer_store_byte [[RESULT]]
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define amdgpu_kernel void @zextload_i1_to_i32_trunc_cmp_eq_1(i1 addrspace(1)* %out, i1 addrspace(1)* %in) nounwind {
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%load = load i1, i1 addrspace(1)* %in
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%ext = zext i1 %load to i32
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%cmp = icmp eq i32 %ext, 1
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store i1 %cmp, i1 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}sextload_i1_to_i32_trunc_cmp_eq_neg1:
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; SI: buffer_load_ubyte [[LOAD:v[0-9]+]]
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; SI: v_and_b32_e32 [[RESULT:v[0-9]+]], 1, [[LOAD]]
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; SI: buffer_store_byte [[RESULT]]
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define amdgpu_kernel void @sextload_i1_to_i32_trunc_cmp_eq_neg1(i1 addrspace(1)* %out, i1 addrspace(1)* %in) nounwind {
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%load = load i1, i1 addrspace(1)* %in
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%ext = sext i1 %load to i32
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%cmp = icmp eq i32 %ext, -1
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store i1 %cmp, i1 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}zextload_i1_to_i32_trunc_cmp_eq_neg1:
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; SI: v_mov_b32_e32 [[RESULT:v[0-9]+]], 0{{$}}
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; SI: buffer_store_byte [[RESULT]]
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define amdgpu_kernel void @zextload_i1_to_i32_trunc_cmp_eq_neg1(i1 addrspace(1)* %out, i1 addrspace(1)* %in) nounwind {
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%load = load i1, i1 addrspace(1)* %in
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%ext = zext i1 %load to i32
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%cmp = icmp eq i32 %ext, -1
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store i1 %cmp, i1 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL {{^}}sextload_i1_to_i32_trunc_cmp_ne_0:
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; SI: buffer_load_ubyte [[LOAD:v[0-9]+]]
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; SI: v_and_b32_e32 [[TMP:v[0-9]+]], 1, [[LOAD]]
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; SI: buffer_store_byte [[RESULT]]
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define amdgpu_kernel void @sextload_i1_to_i32_trunc_cmp_ne_0(i1 addrspace(1)* %out, i1 addrspace(1)* %in) nounwind {
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%load = load i1, i1 addrspace(1)* %in
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%ext = sext i1 %load to i32
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%cmp = icmp ne i32 %ext, 0
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store i1 %cmp, i1 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}zextload_i1_to_i32_trunc_cmp_ne_0:
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; SI: buffer_load_ubyte [[LOAD:v[0-9]+]]
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; SI: v_and_b32_e32 [[RESULT:v[0-9]+]], 1, [[LOAD]]
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; SI: buffer_store_byte [[RESULT]]
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define amdgpu_kernel void @zextload_i1_to_i32_trunc_cmp_ne_0(i1 addrspace(1)* %out, i1 addrspace(1)* %in) nounwind {
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%load = load i1, i1 addrspace(1)* %in
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%ext = zext i1 %load to i32
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%cmp = icmp ne i32 %ext, 0
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store i1 %cmp, i1 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}sextload_i1_to_i32_trunc_cmp_ne_1:
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; SI: v_mov_b32_e32 [[RESULT:v[0-9]+]], 1{{$}}
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; SI: buffer_store_byte [[RESULT]]
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define amdgpu_kernel void @sextload_i1_to_i32_trunc_cmp_ne_1(i1 addrspace(1)* %out, i1 addrspace(1)* %in) nounwind {
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%load = load i1, i1 addrspace(1)* %in
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%ext = sext i1 %load to i32
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%cmp = icmp ne i32 %ext, 1
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store i1 %cmp, i1 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}zextload_i1_to_i32_trunc_cmp_ne_1:
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; SI: buffer_load_ubyte [[LOAD:v[0-9]+]]
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; SI: v_and_b32_e32 [[TMP:v[0-9]+]], 1, [[LOAD]]
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; SI: v_cmp_eq_u32_e32 vcc, 1, [[TMP]]{{$}}
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; SI-NEXT: s_xor_b64 [[NEG:s\[[0-9]+:[0-9]+\]]], vcc, -1
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; SI-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, 1, [[NEG]]
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; SI: buffer_store_byte [[RESULT]]
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define amdgpu_kernel void @zextload_i1_to_i32_trunc_cmp_ne_1(i1 addrspace(1)* %out, i1 addrspace(1)* %in) nounwind {
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%load = load i1, i1 addrspace(1)* %in
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%ext = zext i1 %load to i32
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%cmp = icmp ne i32 %ext, 1
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store i1 %cmp, i1 addrspace(1)* %out
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ret void
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}
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; FIXME: This should be one compare.
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; FUNC-LABEL: {{^}}sextload_i1_to_i32_trunc_cmp_ne_neg1:
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; XSI: buffer_load_ubyte [[LOAD:v[0-9]+]]
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; XSI: v_and_b32_e32 [[TMP:v[0-9]+]], 1, [[LOAD]]
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; XSI: v_cmp_eq_u32_e64 [[CMP0:s\[[0-9]+:[0-9]+\]]], [[TMP]], 0{{$}}
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; XSI-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, 1, [[CMP0]]
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; XSI-NEXT: buffer_store_byte [[RESULT]]
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define amdgpu_kernel void @sextload_i1_to_i32_trunc_cmp_ne_neg1(i1 addrspace(1)* %out, i1 addrspace(1)* %in) nounwind {
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%load = load i1, i1 addrspace(1)* %in
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%ext = sext i1 %load to i32
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%cmp = icmp ne i32 %ext, -1
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store i1 %cmp, i1 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}zextload_i1_to_i32_trunc_cmp_ne_neg1:
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; SI: v_mov_b32_e32 [[RESULT:v[0-9]+]], 1{{$}}
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; SI: buffer_store_byte [[RESULT]]
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define amdgpu_kernel void @zextload_i1_to_i32_trunc_cmp_ne_neg1(i1 addrspace(1)* %out, i1 addrspace(1)* %in) nounwind {
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%load = load i1, i1 addrspace(1)* %in
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%ext = zext i1 %load to i32
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%cmp = icmp ne i32 %ext, -1
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store i1 %cmp, i1 addrspace(1)* %out
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ret void
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}
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; FIXME: Need to handle non-uniform case for function below (load without gep).
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; FUNC-LABEL: {{^}}masked_load_i1_to_i32_trunc_cmp_ne_neg1:
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; SI: {{buffer|flat}}_load_sbyte [[LOAD:v[0-9]+]]
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; SI: v_cmp_ne_u32_e32 vcc, -1, [[LOAD]]{{$}}
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; SI-NEXT: v_cndmask_b32_e64
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; SI: {{buffer|flat}}_store_byte
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define amdgpu_kernel void @masked_load_i1_to_i32_trunc_cmp_ne_neg1(i1 addrspace(1)* %out, i8 addrspace(1)* %in) nounwind {
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%tid.x = call i32 @llvm.amdgcn.workitem.id.x()
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%in.ptr = getelementptr i8, i8 addrspace(1)* %in, i32 %tid.x
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%load = load i8, i8 addrspace(1)* %in.ptr
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%masked = and i8 %load, 255
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%ext = sext i8 %masked to i32
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%cmp = icmp ne i32 %ext, -1
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store i1 %cmp, i1 addrspace(1)* %out
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ret void
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}
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