llvm-project/llvm/test/CodeGen/AMDGPU/coalescer-with-subregs-bad-...

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# RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx803 -run-pass=simple-register-coalescing -o - %s | FileCheck -check-prefix=GCN %s
# With one version of the D48102 fix, this test failed with
# Assertion failed: (Id != S.end() && T != S.end() && T->valno == Id->valno), function pruneSubRegValues, file ../lib/CodeGen/RegisterCoalescer.cpp, line 2870.
# GCN: {{^body}}
--- |
target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5"
target triple = "amdgcn--amdpal"
; Function Attrs: nounwind
define amdgpu_cs void @_amdgpu_cs_main(<3 x i32> %arg) #0 {
ret void
}
attributes #0 = { nounwind "target-cpu"="gfx803" }
...
---
name: _amdgpu_cs_main
tracksRegLiveness: true
liveins:
- { reg: '$vgpr0', virtual-reg: '%0' }
body: |
bb.0:
successors: %bb.1(0x40000000), %bb.21(0x40000000)
liveins: $vgpr0, $vgpr1, $vgpr2
%0:vgpr_32 = COPY killed $vgpr0
S_CBRANCH_SCC1 %bb.21, implicit undef $scc
bb.1:
successors: %bb.2(0x40000000), %bb.17(0x40000000)
S_CBRANCH_SCC1 %bb.17, implicit undef $scc
bb.2:
successors: %bb.4(0x40000000), %bb.3(0x40000000)
%1:sreg_32_xm0 = S_MOV_B32 0
%2:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
undef %3.sub0:vreg_128 = COPY killed %0
%3.sub2:vreg_128 = COPY killed %2
undef %4.sub0:sreg_256 = COPY %1
%4.sub1:sreg_256 = COPY %1
%4.sub2:sreg_256 = COPY %1
%4.sub3:sreg_256 = COPY %1
%4.sub4:sreg_256 = COPY %1
%4.sub5:sreg_256 = COPY %1
%4.sub6:sreg_256 = COPY %1
%4.sub7:sreg_256 = COPY killed %1
%5:vgpr_32 = IMAGE_LOAD_V1_V4 killed %3, killed %4, 1, -1, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 16 from constant-pool, addrspace 4)
%6:vgpr_32 = V_MAD_F32 0, killed %5, 0, 0, 0, 0, 0, 0, implicit $exec
%7:vgpr_32 = V_RCP_F32_e32 killed %6, implicit $exec
%8:vgpr_32 = V_MUL_F32_e32 0, killed %7, implicit $exec
%9:vgpr_32 = V_MAD_F32 0, killed %8, 0, 0, 0, 0, 0, 0, implicit $exec
dead %10:vgpr_32 = V_MAC_F32_e32 undef %11:vgpr_32, undef %12:vgpr_32, undef %10, implicit $exec
undef %13.sub0:vreg_128 = COPY %9
%14:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
S_CBRANCH_SCC0 %bb.4, implicit undef $scc
bb.3:
successors: %bb.6(0x80000000)
%15:vreg_128 = IMPLICIT_DEF
%16:vreg_1 = COPY killed %14
S_BRANCH %bb.6
bb.4:
successors: %bb.5(0x40000000), %bb.7(0x40000000)
%17:vgpr_32 = V_MAD_F32 0, killed %9, 0, 0, 0, 0, 0, 0, implicit $exec
%18:vgpr_32 = V_MIN_F32_e32 1065353216, killed %17, implicit $exec
%19:sreg_64_xexec = V_CMP_NEQ_F32_e64 0, 1065353216, 0, killed %18, 0, implicit $exec
%20:vgpr_32 = V_MOV_B32_e32 2143289344, implicit $exec
%21:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, killed %20, killed %19, implicit $exec
%22:sreg_64 = V_CMP_LT_F32_e64 0, 0, 0, killed %21, 0, implicit $exec
%23:sreg_64 = COPY $exec, implicit-def $exec
%24:sreg_64 = S_AND_B64 %23, %22, implicit-def dead $scc
$exec = S_MOV_B64_term killed %24
SI_MASK_BRANCH %bb.7, implicit $exec
S_BRANCH %bb.5
bb.5:
successors: %bb.7(0x80000000)
S_BRANCH %bb.7
bb.6:
successors: %bb.8(0x40000000), %bb.10(0x40000000)
%25:vreg_1 = COPY killed %16
%26:vreg_128 = COPY killed %15
%27:sreg_64 = V_CMP_NE_U32_e64 0, killed %25, implicit $exec
%28:sreg_64 = S_AND_B64 $exec, killed %27, implicit-def dead $scc
$vcc = COPY killed %28
%29:vreg_128 = COPY killed %26
S_CBRANCH_VCCNZ %bb.8, implicit killed $vcc
S_BRANCH %bb.10
bb.7:
successors: %bb.6(0x80000000)
$exec = S_OR_B64 $exec, killed %23, implicit-def $scc
%30:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
%15:vreg_128 = COPY %13
%16:vreg_1 = COPY killed %30
S_BRANCH %bb.6
bb.8:
successors: %bb.9(0x40000000), %bb.11(0x40000000)
%31:vreg_128 = COPY killed %13
S_CBRANCH_SCC1 %bb.11, implicit undef $scc
S_BRANCH %bb.9
bb.9:
successors: %bb.11(0x80000000)
%32:sreg_32_xm0 = S_MOV_B32 0
undef %33.sub0:sreg_128 = COPY %32
%33.sub1:sreg_128 = COPY %32
%33.sub2:sreg_128 = COPY %32
%33.sub3:sreg_128 = COPY killed %32
%34:sreg_128 = COPY killed %33
%35:vreg_128 = COPY killed %34
%31:vreg_128 = COPY killed %35
S_BRANCH %bb.11
bb.10:
successors: %bb.14(0x80000000)
%36:vreg_128 = COPY killed %29
S_BRANCH %bb.14
bb.11:
successors: %bb.13(0x40000000), %bb.12(0x40000000)
%37:vreg_128 = COPY killed %31
S_CBRANCH_SCC0 %bb.13, implicit undef $scc
bb.12:
successors: %bb.10(0x80000000)
%29:vreg_128 = COPY killed %37
S_BRANCH %bb.10
bb.13:
successors: %bb.10(0x80000000)
%29:vreg_128 = COPY killed %37
S_BRANCH %bb.10
bb.14:
successors: %bb.15(0x40000000), %bb.16(0x40000000)
%38:vgpr_32 = V_MAD_F32 0, killed %36.sub0, 0, target-flags(amdgpu-gotprel) 0, 0, 0, 0, 0, implicit $exec
%39:vgpr_32 = V_MAD_F32 0, killed %38, 0, 0, 0, 0, 0, 0, implicit $exec
%40:vgpr_32 = V_MAD_F32 0, killed %39, 0, -1090519040, 0, 1056964608, 0, 0, implicit $exec
%41:vgpr_32 = V_MAD_F32 0, killed %40, 0, 0, 0, -1090519040, 0, 0, implicit $exec
%42:vgpr_32 = V_CVT_I32_F32_e32 killed %41, implicit $exec
%43:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_IMM undef %44:sreg_128, 12, 0, 0 :: (dereferenceable invariant load 4)
%45:vgpr_32 = V_MUL_LO_I32 killed %42, killed %43, implicit $exec
%46:vgpr_32 = V_LSHLREV_B32_e32 2, killed %45, implicit $exec
%47:vgpr_32 = BUFFER_LOAD_FORMAT_X_IDXEN killed %46, undef %48:sreg_128, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 4 from constant-pool, align 1, addrspace 4)
%49:sreg_64 = V_CMP_NE_U32_e64 0, killed %47, implicit $exec
%50:sreg_64 = COPY $exec, implicit-def $exec
%51:sreg_64 = S_AND_B64 %50, %49, implicit-def dead $scc
$exec = S_MOV_B64_term killed %51
SI_MASK_BRANCH %bb.16, implicit $exec
S_BRANCH %bb.15
bb.15:
successors: %bb.16(0x80000000)
bb.16:
successors: %bb.17(0x80000000)
$exec = S_OR_B64 $exec, killed %50, implicit-def $scc
S_BRANCH %bb.17
bb.17:
successors: %bb.21(0x40000000), %bb.18(0x40000000)
S_CBRANCH_SCC1 %bb.21, implicit undef $scc
bb.18:
successors: %bb.19(0x40000000), %bb.20(0x40000000)
S_CBRANCH_SCC1 %bb.19, implicit undef $scc
S_BRANCH %bb.20
bb.19:
successors: %bb.20(0x80000000)
bb.20:
successors: %bb.21(0x80000000)
bb.21:
S_ENDPGM 0
...