forked from OSchip/llvm-project
bf891b12b4
This is a fix for disassembling unusual instruction sequences in 64-bit
mode w.r.t the CALL rel16 instruction. It might be desirable to move the
check somewhere else, but it essentially mimics the special case
handling with JCXZ in 16-bit mode.
The current behavior accepts the opcode size prefix and causes the
call's immediate to stop disassembling after 2 bytes. When debugging
sequences of instructions with this pattern, the disassembler output
becomes extremely unreliable and essentially useless (if you jump midway
into what lldb thinks is a unified instruction, you'll lose %rip). So we
ignore the prefix and consume all 4 bytes when disassembling a 64-bit
mode binary.
Note: in Vol. 2A 3-99 the Intel spec states that CALL rel16 is N.S. N.S.
is defined as:
Indicates an instruction syntax that requires an address override
prefix in 64-bit mode and is not supported. Using an address
override prefix in 64-bit mode may result in model-specific
execution behavior. (Vol. 2A 3-7)
Since 0x66 is an operand override prefix we should be OK (although we
may want to warn about 0x67 prefixes to 0xe8). On the CPUs I tested
with, they all ignore the 0x66 prefix in 64-bit mode.
Patch by Matthew Barney!
Differential Revision: http://reviews.llvm.org/D9573
llvm-svn: 246038
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| .. | ||
| avx-512.txt | ||
| fp-stack.txt | ||
| hex-immediates.txt | ||
| intel-syntax-32.txt | ||
| intel-syntax.txt | ||
| invalid-VEX-vvvv.txt | ||
| lit.local.cfg | ||
| marked-up.txt | ||
| missing-sib.txt | ||
| moffs.txt | ||
| padlock.txt | ||
| prefixes.txt | ||
| simple-tests.txt | ||
| truncated-input.txt | ||
| x86-16.txt | ||
| x86-32.txt | ||
| x86-64.txt | ||