forked from OSchip/llvm-project
79 lines
2.2 KiB
LLVM
79 lines
2.2 KiB
LLVM
; RUN: llc -march=hexagon -relocation-model=pic < %s | FileCheck %s
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; CHECK: r{{[0-9]+}} = add({{pc|PC}},##.LJTI{{[0-9_]+}}@PCREL)
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; CHECK: r{{[0-9]+}} = memw(r{{[0-9]}}+##g0@GOT
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; CHECK: r{{[0-9]+}} = add({{pc|PC}},##_GLOBAL_OFFSET_TABLE_@PCREL)
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; CHECK: r{{[0-9]+}} = memw(r{{[0-9]*}}+##g1@GOT)
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@g0 = external global i32
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@g1 = external global i32
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; Function Attrs: nounwind
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define i32 @f0(i32 %a0) #0 {
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b0:
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switch i32 %a0, label %b8 [
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i32 2, label %b1
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i32 3, label %b2
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i32 4, label %b3
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i32 5, label %b4
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i32 6, label %b5
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i32 7, label %b6
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i32 8, label %b7
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]
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b1: ; preds = %b0
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tail call void bitcast (void (...)* @f1 to void ()*)() #0
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br label %b8
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b2: ; preds = %b0
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%v0 = load i32, i32* @g0, align 4, !tbaa !0
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%v1 = add nsw i32 %v0, 99
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br label %b9
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b3: ; preds = %b0
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%v2 = load i32, i32* @g1, align 4, !tbaa !0
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%v3 = load i32, i32* @g0, align 4, !tbaa !0
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%v4 = add nsw i32 %v3, %v2
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tail call void @f2(i32 %v4) #0
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br label %b8
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b4: ; preds = %b0
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%v5 = load i32, i32* @g1, align 4, !tbaa !0
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%v6 = load i32, i32* @g0, align 4, !tbaa !0
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%v7 = mul nsw i32 %v6, 2
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%v8 = add i32 %v5, 9
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%v9 = add i32 %v8, %v7
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tail call void @f2(i32 %v9) #0
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br label %b8
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b5: ; preds = %b0
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br label %b8
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b6: ; preds = %b0
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br label %b7
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b7: ; preds = %b6, %b0
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%v10 = phi i32 [ 2, %b0 ], [ 4, %b6 ]
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br label %b8
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b8: ; preds = %b7, %b5, %b4, %b3, %b1, %b0
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%v11 = phi i32 [ %a0, %b0 ], [ %v10, %b7 ], [ 7, %b5 ], [ 5, %b4 ], [ 4, %b3 ], [ 2, %b1 ]
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%v12 = add nsw i32 %v11, 522
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br label %b9
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b9: ; preds = %b8, %b2
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%v13 = phi i32 [ %v12, %b8 ], [ %v1, %b2 ]
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ret i32 %v13
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}
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declare void @f1(...)
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declare void @f2(i32)
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attributes #0 = { nounwind }
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!0 = !{!1, !1, i64 0}
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!1 = !{!"int", !2}
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!2 = !{!"omnipotent char", !3}
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!3 = !{!"Simple C/C++ TBAA"}
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