llvm-project/llvm/test/CodeGen
Simon Pilgrim fe3d59e98b [X86][AVX512] UNPCKL/H PS and PD should be scheduled with WriteFShuffle not WriteFAdd
llvm-svn: 330023
2018-04-13 14:41:05 +00:00
..
AArch64 AArch64: Introduce a DAG combine for folding offsets into addresses. 2018-04-12 21:23:55 +00:00
AMDGPU [AMDGPU] Ensure there are enough registers for wave dispatch 2018-04-11 17:18:36 +00:00
ARC
ARM [NEON] Support intrinsic for scalar and vector versions of the VRINTN instruction 2018-04-13 12:45:12 +00:00
AVR [AVR] Add a regression test for struct return lowering 2018-03-20 11:23:03 +00:00
BPF bpf: fix incorrect SELECT_CC lowering 2018-04-03 03:56:37 +00:00
Generic [DWARFv5] Fuss with asm syntax for conveying MD5 checksum. 2018-04-11 15:14:05 +00:00
Hexagon Disable flaky tests till they get fixed. 2018-04-10 22:07:29 +00:00
Inputs
Lanai
MIR Attempting to work around a non-determinism issue. 2018-04-11 20:29:32 +00:00
MSP430
Mips [MIPS GlobalISel] minor update to MIR tests added in r329819 2018-04-12 09:12:29 +00:00
NVPTX [NVPTX] add support for initializing fp16 arrays. 2018-04-06 22:25:08 +00:00
Nios2
PowerPC [PowerPC] add fsub-fneg test; NFC 2018-04-12 22:14:23 +00:00
RISCV [RISCV] Change function alignment to 4 bytes, and 2 bytes for RVC 2018-04-12 11:30:59 +00:00
SPARC [NFC] fix trivial typos in comments 2018-04-13 11:37:06 +00:00
SystemZ [PostRASink]Add register dependency check for implicit operands 2018-04-13 14:23:09 +00:00
Thumb Reapply ARM: Do not spill CSR to stack on entry to noreturn functions 2018-04-07 10:57:03 +00:00
Thumb2 [CodeGen] Add a new pass for PostRA sink 2018-03-22 20:06:47 +00:00
WebAssembly [WebAssembly] Allow for the creation of user-defined custom sections 2018-04-05 17:01:39 +00:00
WinCFGuard
WinEH
X86 [X86][AVX512] UNPCKL/H PS and PD should be scheduled with WriteFShuffle not WriteFAdd 2018-04-13 14:41:05 +00:00
XCore Use .set instead of = when printing assignment in assembly output 2018-03-27 16:44:41 +00:00