llvm-project/llvm/test/CodeGen/X86/byval4.ll

110 lines
4.1 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-linux -mattr=-avx | FileCheck %s -check-prefix=X64
; Win64 has not supported byval yet.
; RUN: llc < %s -mtriple=i686-- -mattr=-avx | FileCheck %s -check-prefix=X32
%struct.s = type { i16, i16, i16, i16, i16, i16, i16, i16,
i16, i16, i16, i16, i16, i16, i16, i16,
i16, i16, i16, i16, i16, i16, i16, i16,
i16, i16, i16, i16, i16, i16, i16, i16,
i16, i16, i16, i16, i16, i16, i16, i16,
i16, i16, i16, i16, i16, i16, i16, i16,
i16, i16, i16, i16, i16, i16, i16, i16,
i16, i16, i16, i16, i16, i16, i16, i16,
i16 }
define void @g(i16 signext %a1, i16 signext %a2, i16 signext %a3,
; X64-LABEL: g:
; X64: # %bb.0: # %entry
; X64-NEXT: pushq %rbx
; X64-NEXT: subq $288, %rsp # imm = 0x120
; X64-NEXT: movw %di, {{[0-9]+}}(%rsp)
; X64-NEXT: movw %si, {{[0-9]+}}(%rsp)
; X64-NEXT: movw %dx, {{[0-9]+}}(%rsp)
; X64-NEXT: movw %cx, {{[0-9]+}}(%rsp)
; X64-NEXT: movw %r8w, {{[0-9]+}}(%rsp)
; X64-NEXT: movw %r9w, {{[0-9]+}}(%rsp)
; X64-NEXT: leaq {{[0-9]+}}(%rsp), %rbx
; X64-NEXT: movl $16, %ecx
; X64-NEXT: movq %rsp, %rdi
; X64-NEXT: movq %rbx, %rsi
; X64-NEXT: rep;movsq (%rsi), %es:(%rdi)
; X64-NEXT: movzwl {{[0-9]+}}(%rsp), %eax
; X64-NEXT: movw %ax, {{[0-9]+}}(%rsp)
; X64-NEXT: callq f
; X64-NEXT: movl $16, %ecx
; X64-NEXT: movq %rsp, %rdi
; X64-NEXT: movq %rbx, %rsi
; X64-NEXT: rep;movsq (%rsi), %es:(%rdi)
; X64-NEXT: movzwl {{[0-9]+}}(%rsp), %eax
; X64-NEXT: movw %ax, {{[0-9]+}}(%rsp)
; X64-NEXT: callq f
; X64-NEXT: addq $288, %rsp # imm = 0x120
; X64-NEXT: popq %rbx
; X64-NEXT: retq
;
; X32-LABEL: g:
; X32: # %bb.0: # %entry
; X32-NEXT: pushl %ebp
; X32-NEXT: movl %esp, %ebp
; X32-NEXT: pushl %ebx
; X32-NEXT: pushl %edi
; X32-NEXT: pushl %esi
; X32-NEXT: andl $-16, %esp
; X32-NEXT: subl $288, %esp # imm = 0x120
; X32-NEXT: movzwl 8(%ebp), %eax
; X32-NEXT: movw %ax, {{[0-9]+}}(%esp)
; X32-NEXT: movzwl 12(%ebp), %eax
; X32-NEXT: movw %ax, {{[0-9]+}}(%esp)
; X32-NEXT: movzwl 16(%ebp), %eax
; X32-NEXT: movw %ax, {{[0-9]+}}(%esp)
; X32-NEXT: movzwl 20(%ebp), %eax
; X32-NEXT: movw %ax, {{[0-9]+}}(%esp)
; X32-NEXT: movzwl 24(%ebp), %eax
; X32-NEXT: movw %ax, {{[0-9]+}}(%esp)
; X32-NEXT: movzwl 28(%ebp), %eax
; X32-NEXT: movw %ax, {{[0-9]+}}(%esp)
; X32-NEXT: leal {{[0-9]+}}(%esp), %ebx
; X32-NEXT: movl $32, %ecx
; X32-NEXT: movl %esp, %edi
; X32-NEXT: movl %ebx, %esi
; X32-NEXT: rep;movsl (%esi), %es:(%edi)
; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movw %ax, {{[0-9]+}}(%esp)
; X32-NEXT: calll f
; X32-NEXT: movl $32, %ecx
; X32-NEXT: movl %esp, %edi
; X32-NEXT: movl %ebx, %esi
; X32-NEXT: rep;movsl (%esi), %es:(%edi)
; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movw %ax, {{[0-9]+}}(%esp)
; X32-NEXT: calll f
; X32-NEXT: leal -12(%ebp), %esp
; X32-NEXT: popl %esi
; X32-NEXT: popl %edi
; X32-NEXT: popl %ebx
; X32-NEXT: popl %ebp
; X32-NEXT: retl
i16 signext %a4, i16 signext %a5, i16 signext %a6) nounwind {
entry:
%a = alloca %struct.s, align 16
%tmp = getelementptr %struct.s, %struct.s* %a, i32 0, i32 0
store i16 %a1, i16* %tmp, align 16
%tmp2 = getelementptr %struct.s, %struct.s* %a, i32 0, i32 1
store i16 %a2, i16* %tmp2, align 16
%tmp4 = getelementptr %struct.s, %struct.s* %a, i32 0, i32 2
store i16 %a3, i16* %tmp4, align 16
%tmp6 = getelementptr %struct.s, %struct.s* %a, i32 0, i32 3
store i16 %a4, i16* %tmp6, align 16
%tmp8 = getelementptr %struct.s, %struct.s* %a, i32 0, i32 4
store i16 %a5, i16* %tmp8, align 16
%tmp10 = getelementptr %struct.s, %struct.s* %a, i32 0, i32 5
store i16 %a6, i16* %tmp10, align 16
call void @f( %struct.s* byval %a )
call void @f( %struct.s* byval %a )
ret void
}
declare void @f(%struct.s* byval)