forked from OSchip/llvm-project
27 lines
2.2 KiB
ArmAsm
27 lines
2.2 KiB
ArmAsm
# Instructions that are available for the current ISA but should be rejected by
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# the assembler (e.g. invalid set of operands or operand's restrictions not met).
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# RUN: not llvm-mc %s -triple=mips64-unknown-linux -mcpu=mips64r6 2>%t1
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# RUN: FileCheck %s < %t1
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.text
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local_label:
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.set noreorder
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.set noat
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jalr.hb $31 # CHECK: :[[@LINE]]:9: error: source and destination must be different
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jalr.hb $31, $31 # CHECK: :[[@LINE]]:9: error: source and destination must be different
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ldc2 $8,-21181($at) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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break 1024 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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break 1024, 5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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break 7, 1024 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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break 1024, 1024 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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// FIXME: Following tests are temporarely disabled, until "PredicateControl not in hierarchy" problem is resolved
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bltl $7, $8, local_label # -CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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bltul $7, $8, local_label # -CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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blel $7, $8, local_label # -CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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bleul $7, $8, local_label # -CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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bgel $7, $8, local_label # -CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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bgeul $7, $8, local_label # -CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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bgtl $7, $8, local_label # -CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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bgtul $7, $8, local_label # -CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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