forked from OSchip/llvm-project
97 lines
3.1 KiB
LLVM
97 lines
3.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -O0 -mtriple=aarch64-unknown-unknown | FileCheck %s
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; Function Attrs: nobuiltin nounwind readonly
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define i8 @popcount128(i128* nocapture nonnull readonly %0) {
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; CHECK-LABEL: popcount128:
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; CHECK: // %bb.0: // %Entry
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; CHECK-NEXT: ldr q0, [x0]
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; CHECK-NEXT: cnt v0.16b, v0.16b
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; CHECK-NEXT: uaddlv h1, v0.16b
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; CHECK-NEXT: // implicit-def: $q0
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; CHECK-NEXT: fmov s0, s1
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; CHECK-NEXT: // kill: def $s0 killed $s0 killed $q0
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; CHECK-NEXT: fmov w0, s0
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; CHECK-NEXT: ret
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Entry:
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%1 = load i128, i128* %0, align 16
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%2 = tail call i128 @llvm.ctpop.i128(i128 %1)
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%3 = trunc i128 %2 to i8
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ret i8 %3
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}
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; Function Attrs: nounwind readnone speculatable willreturn
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declare i128 @llvm.ctpop.i128(i128)
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; Function Attrs: nobuiltin nounwind readonly
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define i16 @popcount256(i256* nocapture nonnull readonly %0) {
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; CHECK-LABEL: popcount256:
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; CHECK: // %bb.0: // %Entry
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; CHECK-NEXT: ldr x11, [x0]
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; CHECK-NEXT: ldr x10, [x0, #8]
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; CHECK-NEXT: ldr x9, [x0, #16]
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; CHECK-NEXT: ldr x8, [x0, #24]
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; CHECK-NEXT: // implicit-def: $q1
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; CHECK-NEXT: mov v1.d[0], x11
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; CHECK-NEXT: mov v1.d[1], x10
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; CHECK-NEXT: // implicit-def: $q0
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; CHECK-NEXT: mov v0.d[0], x9
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; CHECK-NEXT: mov v0.d[1], x8
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; CHECK-NEXT: cnt v1.16b, v1.16b
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; CHECK-NEXT: uaddlv h2, v1.16b
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; CHECK-NEXT: // implicit-def: $q1
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; CHECK-NEXT: fmov s1, s2
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; CHECK-NEXT: // kill: def $s1 killed $s1 killed $q1
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; CHECK-NEXT: fmov w0, s1
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; CHECK-NEXT: mov w10, wzr
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; CHECK-NEXT: mov w9, w0
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; CHECK-NEXT: mov w8, w10
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; CHECK-NEXT: bfi x9, x8, #32, #32
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; CHECK-NEXT: cnt v0.16b, v0.16b
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; CHECK-NEXT: uaddlv h1, v0.16b
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; CHECK-NEXT: // implicit-def: $q0
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; CHECK-NEXT: fmov s0, s1
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; CHECK-NEXT: // kill: def $s0 killed $s0 killed $q0
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; CHECK-NEXT: fmov w0, s0
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; CHECK-NEXT: mov w8, w0
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; CHECK-NEXT: // kill: def $x10 killed $w10
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; CHECK-NEXT: bfi x8, x10, #32, #32
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; CHECK-NEXT: adds x8, x8, x9
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; CHECK-NEXT: cset w9, hs
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; CHECK-NEXT: mov w0, w8
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; CHECK-NEXT: ret
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Entry:
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%1 = load i256, i256* %0, align 16
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%2 = tail call i256 @llvm.ctpop.i256(i256 %1)
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%3 = trunc i256 %2 to i16
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ret i16 %3
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}
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; Function Attrs: nounwind readnone speculatable willreturn
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declare i256 @llvm.ctpop.i256(i256)
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define <1 x i128> @popcount1x128(<1 x i128> %0) {
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; CHECK-LABEL: popcount1x128:
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; CHECK: // %bb.0: // %Entry
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; CHECK-NEXT: // implicit-def: $q0
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; CHECK-NEXT: mov v0.d[0], x0
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; CHECK-NEXT: mov v0.d[1], x1
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; CHECK-NEXT: cnt v0.16b, v0.16b
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; CHECK-NEXT: uaddlv h1, v0.16b
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; CHECK-NEXT: // implicit-def: $q0
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; CHECK-NEXT: fmov s0, s1
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; CHECK-NEXT: // kill: def $s0 killed $s0 killed $q0
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; CHECK-NEXT: fmov w0, s0
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; CHECK-NEXT: mov w8, wzr
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; CHECK-NEXT: // kill: def $x0 killed $w0
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; CHECK-NEXT: // kill: def $x8 killed $w8
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; CHECK-NEXT: bfi x0, x8, #32, #32
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; CHECK-NEXT: mov x1, xzr
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; CHECK-NEXT: ret
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Entry:
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%1 = tail call <1 x i128> @llvm.ctpop.v1.i128(<1 x i128> %0)
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ret <1 x i128> %1
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}
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declare <1 x i128> @llvm.ctpop.v1.i128(<1 x i128>)
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