Tim Northover 8d2f52e035 GlobalISel: support zero-sized allocas ... All allocas must be at least 1 byte at the MachineIR level so we allocate just one byte. llvm-svn: 276897		2016-07-27 17:47:54 +00:00
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AArch64	GlobalISel: support zero-sized allocas	2016-07-27 17:47:54 +00:00
AMDGPU	AMDGPU: Use rcp for fdiv 1, x with fpmath metadata	2016-07-26 23:25:44 +00:00
ARM	MIRParser: Use shorter cfi identifiers	2016-07-26 18:20:00 +00:00
BPF	[BPF] Remove exit-on-error from tests (PR27768, PR27769)	2016-05-30 08:28:34 +00:00
Generic	Move mempcpy_call.ll to X86 subdirectory	2016-07-13 18:28:45 +00:00
Hexagon	[Hexagon] Post-increment loads/stores enhancements	2016-07-26 20:30:30 +00:00
Inputs	…
Lanai	[lanai] Use peephole optimizer to generate more conditional ALU operations.	2016-07-07 23:36:04 +00:00
MIR	MIRParser: Use dot instead of colon to mark subregisters	2016-07-26 21:49:34 +00:00
MSP430	…
Mips	[mips] MIPS64R6 compact branch support	2016-07-26 10:25:07 +00:00
NVPTX	Fix NVPTX/call-with-alloca-buffer.ll after r276777.	2016-07-26 18:28:33 +00:00
PowerPC	Revert "RegScavenging: Add scavengeRegisterBackwards()"	2016-07-20 00:21:32 +00:00
SPARC	VirtRegMap: Replace some identity copies with KILL instructions.	2016-07-09 00:19:07 +00:00
SystemZ	Revert "RegScavenging: Add scavengeRegisterBackwards()"	2016-07-20 00:21:32 +00:00
Thumb	Revert "RegScavenging: Add scavengeRegisterBackwards()"	2016-07-20 00:21:32 +00:00
Thumb2	[Thumb] Reapply r272251 with a fix for PR28348 (mk 2)	2016-07-05 12:37:13 +00:00
WebAssembly	[WebAssembly] Emit type signatures for declared functions	2016-06-03 18:34:36 +00:00
WinEH	revert http://reviews.llvm.org/D21101	2016-06-30 17:52:24 +00:00
X86	[X86][SSE] Updated test so that both are applying the post-multiply	2016-07-27 15:30:20 +00:00
XCore	IR: Introduce Module::global_objects().	2016-06-22 20:29:42 +00:00