forked from OSchip/llvm-project
420 lines
16 KiB
C++
420 lines
16 KiB
C++
//===- CodeMoverUtils.cpp - CodeMover Utilities ----------------------------==//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This family of functions perform movements on basic blocks, and instructions
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// contained within a function.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Transforms/Utils/CodeMoverUtils.h"
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#include "llvm/ADT/Optional.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/Analysis/DependenceAnalysis.h"
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#include "llvm/Analysis/OrderedInstructions.h"
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#include "llvm/Analysis/PostDominators.h"
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#include "llvm/Analysis/ValueTracking.h"
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#include "llvm/IR/Dominators.h"
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using namespace llvm;
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#define DEBUG_TYPE "codemover-utils"
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STATISTIC(HasDependences,
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"Cannot move across instructions that has memory dependences");
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STATISTIC(MayThrowException, "Cannot move across instructions that may throw");
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STATISTIC(NotControlFlowEquivalent,
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"Instructions are not control flow equivalent");
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STATISTIC(NotMovedPHINode, "Movement of PHINodes are not supported");
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STATISTIC(NotMovedTerminator, "Movement of Terminator are not supported");
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namespace {
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/// Represent a control condition. A control condition is a condition of a
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/// terminator to decide which successors to execute. The pointer field
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/// represents the address of the condition of the terminator. The integer field
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/// is a bool, it is true when the basic block is executed when V is true. For
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/// example, `br %cond, bb0, bb1` %cond is a control condition of bb0 with the
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/// integer field equals to true, while %cond is a control condition of bb1 with
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/// the integer field equals to false.
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using ControlCondition = PointerIntPair<Value *, 1, bool>;
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#ifndef NDEBUG
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raw_ostream &operator<<(raw_ostream &OS, const ControlCondition &C) {
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OS << "[" << *C.getPointer() << ", " << (C.getInt() ? "true" : "false")
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<< "]";
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return OS;
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}
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#endif
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/// Represent a set of control conditions required to execute ToBB from FromBB.
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class ControlConditions {
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using ConditionVectorTy = SmallVector<ControlCondition, 6>;
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/// A SmallVector of control conditions.
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ConditionVectorTy Conditions;
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public:
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/// Return a ControlConditions which stores all conditions required to execute
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/// \p BB from \p Dominator. If \p MaxLookup is non-zero, it limits the
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/// number of conditions to collect. Return None if not all conditions are
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/// collected successfully, or we hit the limit.
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static const Optional<ControlConditions>
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collectControlConditions(const BasicBlock &BB, const BasicBlock &Dominator,
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const DominatorTree &DT,
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const PostDominatorTree &PDT,
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unsigned MaxLookup = 6);
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/// Return true if there exists no control conditions required to execute ToBB
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/// from FromBB.
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bool isUnconditional() const { return Conditions.empty(); }
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/// Return a constant reference of Conditions.
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const ConditionVectorTy &getControlConditions() const { return Conditions; }
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/// Add \p V as one of the ControlCondition in Condition with IsTrueCondition
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/// equals to \p True. Return true if inserted successfully.
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bool addControlCondition(ControlCondition C);
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/// Return true if for all control conditions in Conditions, there exists an
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/// equivalent control condition in \p Other.Conditions.
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bool isEquivalent(const ControlConditions &Other) const;
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/// Return true if \p C1 and \p C2 are equivalent.
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static bool isEquivalent(const ControlCondition &C1,
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const ControlCondition &C2);
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private:
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ControlConditions() = default;
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static bool isEquivalent(const Value &V1, const Value &V2);
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static bool isInverse(const Value &V1, const Value &V2);
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};
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} // namespace
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const Optional<ControlConditions> ControlConditions::collectControlConditions(
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const BasicBlock &BB, const BasicBlock &Dominator, const DominatorTree &DT,
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const PostDominatorTree &PDT, unsigned MaxLookup) {
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assert(DT.dominates(&Dominator, &BB) && "Expecting Dominator to dominate BB");
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ControlConditions Conditions;
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unsigned NumConditions = 0;
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// BB is executed unconditional from itself.
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if (&Dominator == &BB)
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return Conditions;
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const BasicBlock *CurBlock = &BB;
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// Walk up the dominator tree from the associated DT node for BB to the
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// associated DT node for Dominator.
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do {
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assert(DT.getNode(CurBlock) && "Expecting a valid DT node for CurBlock");
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BasicBlock *IDom = DT.getNode(CurBlock)->getIDom()->getBlock();
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assert(DT.dominates(&Dominator, IDom) &&
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"Expecting Dominator to dominate IDom");
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// Limitation: can only handle branch instruction currently.
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const BranchInst *BI = dyn_cast<BranchInst>(IDom->getTerminator());
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if (!BI)
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return None;
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bool Inserted = false;
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if (PDT.dominates(CurBlock, IDom)) {
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LLVM_DEBUG(dbgs() << CurBlock->getName()
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<< " is executed unconditionally from "
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<< IDom->getName() << "\n");
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} else if (PDT.dominates(CurBlock, BI->getSuccessor(0))) {
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LLVM_DEBUG(dbgs() << CurBlock->getName() << " is executed when \""
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<< *BI->getCondition() << "\" is true from "
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<< IDom->getName() << "\n");
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Inserted = Conditions.addControlCondition(
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ControlCondition(BI->getCondition(), true));
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} else if (PDT.dominates(CurBlock, BI->getSuccessor(1))) {
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LLVM_DEBUG(dbgs() << CurBlock->getName() << " is executed when \""
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<< *BI->getCondition() << "\" is false from "
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<< IDom->getName() << "\n");
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Inserted = Conditions.addControlCondition(
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ControlCondition(BI->getCondition(), false));
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} else
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return None;
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if (Inserted)
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++NumConditions;
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if (MaxLookup != 0 && NumConditions > MaxLookup)
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return None;
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CurBlock = IDom;
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} while (CurBlock != &Dominator);
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return Conditions;
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}
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bool ControlConditions::addControlCondition(ControlCondition C) {
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bool Inserted = false;
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if (none_of(Conditions, [&](ControlCondition &Exists) {
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return ControlConditions::isEquivalent(C, Exists);
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})) {
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Conditions.push_back(C);
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Inserted = true;
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}
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LLVM_DEBUG(dbgs() << (Inserted ? "Inserted " : "Not inserted ") << C << "\n");
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return Inserted;
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}
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bool ControlConditions::isEquivalent(const ControlConditions &Other) const {
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if (Conditions.empty() && Other.Conditions.empty())
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return true;
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if (Conditions.size() != Other.Conditions.size())
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return false;
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return all_of(Conditions, [&](const ControlCondition &C) {
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return any_of(Other.Conditions, [&](const ControlCondition &OtherC) {
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return ControlConditions::isEquivalent(C, OtherC);
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});
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});
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}
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bool ControlConditions::isEquivalent(const ControlCondition &C1,
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const ControlCondition &C2) {
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if (C1.getInt() == C2.getInt()) {
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if (isEquivalent(*C1.getPointer(), *C2.getPointer()))
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return true;
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} else if (isInverse(*C1.getPointer(), *C2.getPointer()))
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return true;
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return false;
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}
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// FIXME: Use SCEV and reuse GVN/CSE logic to check for equivalence between
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// Values.
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// Currently, isEquivalent rely on other passes to ensure equivalent conditions
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// have the same value, e.g. GVN.
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bool ControlConditions::isEquivalent(const Value &V1, const Value &V2) {
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return &V1 == &V2;
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}
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bool ControlConditions::isInverse(const Value &V1, const Value &V2) {
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if (const CmpInst *Cmp1 = dyn_cast<CmpInst>(&V1))
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if (const CmpInst *Cmp2 = dyn_cast<CmpInst>(&V2)) {
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if (Cmp1->getPredicate() == Cmp2->getInversePredicate() &&
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Cmp1->getOperand(0) == Cmp2->getOperand(0) &&
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Cmp1->getOperand(1) == Cmp2->getOperand(1))
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return true;
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if (Cmp1->getPredicate() ==
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CmpInst::getSwappedPredicate(Cmp2->getInversePredicate()) &&
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Cmp1->getOperand(0) == Cmp2->getOperand(1) &&
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Cmp1->getOperand(1) == Cmp2->getOperand(0))
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return true;
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}
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return false;
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}
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bool llvm::isControlFlowEquivalent(const Instruction &I0, const Instruction &I1,
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const DominatorTree &DT,
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const PostDominatorTree &PDT) {
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return isControlFlowEquivalent(*I0.getParent(), *I1.getParent(), DT, PDT);
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}
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bool llvm::isControlFlowEquivalent(const BasicBlock &BB0, const BasicBlock &BB1,
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const DominatorTree &DT,
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const PostDominatorTree &PDT) {
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if (&BB0 == &BB1)
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return true;
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if ((DT.dominates(&BB0, &BB1) && PDT.dominates(&BB1, &BB0)) ||
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(PDT.dominates(&BB0, &BB1) && DT.dominates(&BB1, &BB0)))
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return true;
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// If the set of conditions required to execute BB0 and BB1 from their common
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// dominator are the same, then BB0 and BB1 are control flow equivalent.
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const BasicBlock *CommonDominator = DT.findNearestCommonDominator(&BB0, &BB1);
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LLVM_DEBUG(dbgs() << "The nearest common dominator of " << BB0.getName()
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<< " and " << BB1.getName() << " is "
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<< CommonDominator->getName() << "\n");
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const Optional<ControlConditions> BB0Conditions =
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ControlConditions::collectControlConditions(BB0, *CommonDominator, DT,
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PDT);
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if (BB0Conditions == None)
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return false;
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const Optional<ControlConditions> BB1Conditions =
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ControlConditions::collectControlConditions(BB1, *CommonDominator, DT,
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PDT);
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if (BB1Conditions == None)
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return false;
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return BB0Conditions->isEquivalent(*BB1Conditions);
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}
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static bool reportInvalidCandidate(const Instruction &I,
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llvm::Statistic &Stat) {
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++Stat;
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LLVM_DEBUG(dbgs() << "Unable to move instruction: " << I << ". "
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<< Stat.getDesc());
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return false;
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}
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/// Collect all instructions in between \p StartInst and \p EndInst, and store
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/// them in \p InBetweenInsts.
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static void
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collectInstructionsInBetween(Instruction &StartInst, const Instruction &EndInst,
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SmallPtrSetImpl<Instruction *> &InBetweenInsts) {
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assert(InBetweenInsts.empty() && "Expecting InBetweenInsts to be empty");
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/// Get the next instructions of \p I, and push them to \p WorkList.
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auto getNextInsts = [](Instruction &I,
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SmallPtrSetImpl<Instruction *> &WorkList) {
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if (Instruction *NextInst = I.getNextNode())
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WorkList.insert(NextInst);
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else {
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assert(I.isTerminator() && "Expecting a terminator instruction");
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for (BasicBlock *Succ : successors(&I))
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WorkList.insert(&Succ->front());
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}
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};
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SmallPtrSet<Instruction *, 10> WorkList;
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getNextInsts(StartInst, WorkList);
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while (!WorkList.empty()) {
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Instruction *CurInst = *WorkList.begin();
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WorkList.erase(CurInst);
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if (CurInst == &EndInst)
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continue;
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if (!InBetweenInsts.insert(CurInst).second)
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continue;
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getNextInsts(*CurInst, WorkList);
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}
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}
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bool llvm::isSafeToMoveBefore(Instruction &I, Instruction &InsertPoint,
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DominatorTree &DT, const PostDominatorTree &PDT,
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DependenceInfo &DI) {
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// Cannot move itself before itself.
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if (&I == &InsertPoint)
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return false;
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// Not moved.
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if (I.getNextNode() == &InsertPoint)
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return true;
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if (isa<PHINode>(I) || isa<PHINode>(InsertPoint))
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return reportInvalidCandidate(I, NotMovedPHINode);
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if (I.isTerminator())
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return reportInvalidCandidate(I, NotMovedTerminator);
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// TODO remove this limitation.
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if (!isControlFlowEquivalent(I, InsertPoint, DT, PDT))
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return reportInvalidCandidate(I, NotControlFlowEquivalent);
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OrderedInstructions OI(&DT);
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DT.updateDFSNumbers();
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const bool MoveForward = OI.dfsBefore(&I, &InsertPoint);
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if (MoveForward) {
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// When I is being moved forward, we need to make sure the InsertPoint
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// dominates every users. Or else, a user may be using an undefined I.
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for (const Use &U : I.uses())
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if (auto *UserInst = dyn_cast<Instruction>(U.getUser()))
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if (UserInst != &InsertPoint && !DT.dominates(&InsertPoint, U))
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return false;
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} else {
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// When I is being moved backward, we need to make sure all its opernads
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// dominates the InsertPoint. Or else, an operand may be undefined for I.
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for (const Value *Op : I.operands())
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if (auto *OpInst = dyn_cast<Instruction>(Op))
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if (&InsertPoint == OpInst || !OI.dominates(OpInst, &InsertPoint))
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return false;
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}
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Instruction &StartInst = (MoveForward ? I : InsertPoint);
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Instruction &EndInst = (MoveForward ? InsertPoint : I);
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SmallPtrSet<Instruction *, 10> InstsToCheck;
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collectInstructionsInBetween(StartInst, EndInst, InstsToCheck);
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if (!MoveForward)
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InstsToCheck.insert(&InsertPoint);
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// Check if there exists instructions which may throw, may synchonize, or may
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// never return, from I to InsertPoint.
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if (!isSafeToSpeculativelyExecute(&I))
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if (std::any_of(InstsToCheck.begin(), InstsToCheck.end(),
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[](Instruction *I) {
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if (I->mayThrow())
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return true;
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const CallBase *CB = dyn_cast<CallBase>(I);
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if (!CB)
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return false;
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if (!CB->hasFnAttr(Attribute::WillReturn))
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return true;
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if (!CB->hasFnAttr(Attribute::NoSync))
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return true;
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return false;
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})) {
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return reportInvalidCandidate(I, MayThrowException);
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}
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// Check if I has any output/flow/anti dependences with instructions from \p
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// StartInst to \p EndInst.
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if (std::any_of(InstsToCheck.begin(), InstsToCheck.end(),
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[&DI, &I](Instruction *CurInst) {
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auto DepResult = DI.depends(&I, CurInst, true);
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if (DepResult &&
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(DepResult->isOutput() || DepResult->isFlow() ||
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DepResult->isAnti()))
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return true;
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return false;
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}))
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return reportInvalidCandidate(I, HasDependences);
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return true;
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}
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bool llvm::isSafeToMoveBefore(BasicBlock &BB, Instruction &InsertPoint,
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DominatorTree &DT, const PostDominatorTree &PDT,
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DependenceInfo &DI) {
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return llvm::all_of(BB, [&](Instruction &I) {
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if (BB.getTerminator() == &I)
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return true;
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return isSafeToMoveBefore(I, InsertPoint, DT, PDT, DI);
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});
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}
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void llvm::moveInstructionsToTheBeginning(BasicBlock &FromBB, BasicBlock &ToBB,
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DominatorTree &DT,
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const PostDominatorTree &PDT,
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DependenceInfo &DI) {
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for (auto It = ++FromBB.rbegin(); It != FromBB.rend();) {
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Instruction *MovePos = ToBB.getFirstNonPHIOrDbg();
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Instruction &I = *It;
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// Increment the iterator before modifying FromBB.
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++It;
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if (isSafeToMoveBefore(I, *MovePos, DT, PDT, DI))
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I.moveBefore(MovePos);
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}
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}
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void llvm::moveInstructionsToTheEnd(BasicBlock &FromBB, BasicBlock &ToBB,
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DominatorTree &DT,
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const PostDominatorTree &PDT,
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DependenceInfo &DI) {
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Instruction *MovePos = ToBB.getTerminator();
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while (FromBB.size() > 1) {
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Instruction &I = FromBB.front();
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if (isSafeToMoveBefore(I, *MovePos, DT, PDT, DI))
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I.moveBefore(MovePos);
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}
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}
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