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AArch64
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[AArch64][GlobalISel] Zero-extend s1 values when returning.
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2018-06-01 13:20:32 +00:00 |
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AMDGPU
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AMDGPU: Switch some half using-tests to use amdhsa
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2018-06-01 07:06:03 +00:00 |
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ARC
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…
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ARM
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[NEON] Support VLD1xN intrinsics in AArch32 mode (LLVM part)
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2018-06-02 16:40:03 +00:00 |
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AVR
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…
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BPF
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[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
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2018-05-09 02:40:45 +00:00 |
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Generic
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[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
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2018-05-09 02:40:45 +00:00 |
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Hexagon
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[Hexagon] Select HVX code for vector CTPOP, CTLZ, and CTTZ
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2018-06-01 14:52:58 +00:00 |
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Inputs
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…
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Lanai
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…
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MIR
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[NFC] MIR-Canon: switching to a stable string sorting of instructions.
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2018-05-13 06:07:20 +00:00 |
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MSP430
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Emit a left-shift instead of a power-of-two multiply for jump-tables
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2018-05-16 08:58:26 +00:00 |
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Mips
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[mips] Select the correct instruction for computing frameindexes
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2018-06-01 10:07:10 +00:00 |
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NVPTX
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[DAG] fold FP binops with undef operands to NaN
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2018-05-21 23:54:19 +00:00 |
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Nios2
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…
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PowerPC
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[PowerPC] Fix the incorrect iterator inside peephole
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2018-05-29 13:38:56 +00:00 |
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RISCV
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[RISCV] Add peepholes for Global Address lowering patterns
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2018-05-29 19:34:54 +00:00 |
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SPARC
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[Sparc] Select correct register class for FP register constraints
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2018-05-30 06:07:55 +00:00 |
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SystemZ
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[SystemZ] Bugfix in combineSTORE().
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2018-05-25 09:01:23 +00:00 |
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Thumb
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Reapply ARM: Do not spill CSR to stack on entry to noreturn functions
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2018-04-07 10:57:03 +00:00 |
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Thumb2
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[Thumb2] fix typo in test from r332548
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2018-05-17 03:24:25 +00:00 |
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WebAssembly
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[WebAssembly] Update to the new names for the memory intrinsics.
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2018-05-31 22:35:25 +00:00 |
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WinCFGuard
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…
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WinEH
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[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
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2018-05-09 02:40:45 +00:00 |
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X86
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[X86][SSE] Cleanup SSE3/SSSE3 intrinsics tests
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2018-06-02 18:41:46 +00:00 |
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XCore
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[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
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2018-05-09 02:40:45 +00:00 |
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