forked from OSchip/llvm-project
177 lines
10 KiB
MLIR
177 lines
10 KiB
MLIR
// RUN: mlir-translate -mlir-to-rocdlir %s | FileCheck %s
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llvm.func @rocdl_special_regs() -> i32 {
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// CHECK-LABEL: rocdl_special_regs
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// CHECK: call i32 @llvm.amdgcn.workitem.id.x()
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%1 = rocdl.workitem.id.x : i32
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// CHECK: call i32 @llvm.amdgcn.workitem.id.y()
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%2 = rocdl.workitem.id.y : i32
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// CHECK: call i32 @llvm.amdgcn.workitem.id.z()
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%3 = rocdl.workitem.id.z : i32
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// CHECK: call i32 @llvm.amdgcn.workgroup.id.x()
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%4 = rocdl.workgroup.id.x : i32
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// CHECK: call i32 @llvm.amdgcn.workgroup.id.y()
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%5 = rocdl.workgroup.id.y : i32
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// CHECK: call i32 @llvm.amdgcn.workgroup.id.z()
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%6 = rocdl.workgroup.id.z : i32
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// CHECK: call i64 @__ockl_get_local_size(i32 0)
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%7 = rocdl.workgroup.dim.x : i64
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// CHECK: call i64 @__ockl_get_local_size(i32 1)
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%8 = rocdl.workgroup.dim.y : i64
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// CHECK: call i64 @__ockl_get_local_size(i32 2)
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%9 = rocdl.workgroup.dim.z : i64
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// CHECK: call i64 @__ockl_get_global_size(i32 0)
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%10 = rocdl.grid.dim.x : i64
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// CHECK: call i64 @__ockl_get_global_size(i32 1)
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%11 = rocdl.grid.dim.y : i64
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// CHECK: call i64 @__ockl_get_global_size(i32 2)
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%12 = rocdl.grid.dim.z : i64
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llvm.return %1 : i32
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}
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llvm.func @kernel_func() attributes {gpu.kernel} {
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// CHECK-LABEL: amdgpu_kernel void @kernel_func
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llvm.return
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}
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llvm.func @rocdl.barrier() {
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// CHECK: fence syncscope("workgroup") release
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// CHECK-NEXT: call void @llvm.amdgcn.s.barrier()
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// CHECK-NEXT: fence syncscope("workgroup") acquire
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rocdl.barrier
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llvm.return
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}
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llvm.func @rocdl.xdlops(%arg0 : f32, %arg1 : f32,
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%arg2 : vector<32 x f32>, %arg3 : i32,
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%arg4 : vector<16 x f32>, %arg5 : vector<4xf32>,
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%arg6 : vector<4xf16>, %arg7 : vector<32 x i32>,
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%arg8 : vector<16 x i32>, %arg9 : vector<4xi32>,
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%arg10 : vector<2xi16>) -> vector<32 x f32> {
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// CHECK-LABEL: rocdl.xdlops
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// CHECK: call <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float %{{.*}}, float %{{.*}}, <32 x float> %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}})
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%r0 = rocdl.mfma.f32.32x32x1f32 %arg0, %arg1, %arg2, %arg3, %arg3, %arg3 :
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(f32, f32, vector<32 x f32>,
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i32, i32, i32) -> vector<32 x f32>
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// CHECK: call <16 x float> @llvm.amdgcn.mfma.f32.16x16x1f32(float %{{.*}}, float %{{.*}}, <16 x float> %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}})
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%r1 = rocdl.mfma.f32.16x16x1f32 %arg0, %arg1, %arg4, %arg3, %arg3, %arg3 :
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(f32, f32, vector<16 x f32>,
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i32, i32, i32) -> vector<16 x f32>
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// CHECK: call <4 x float> @llvm.amdgcn.mfma.f32.16x16x4f32(float %{{.*}}, float %{{.*}}, <4 x float> %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}})
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%r2 = rocdl.mfma.f32.16x16x4f32 %arg0, %arg1, %arg5, %arg3, %arg3, %arg3 :
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(f32, f32, vector<4xf32>,
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i32, i32, i32) -> vector<4xf32>
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// CHECK: call <4 x float> @llvm.amdgcn.mfma.f32.4x4x1f32(float %{{.*}}, float %{{.*}}, <4 x float> %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}})
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%r3 = rocdl.mfma.f32.4x4x1f32 %arg0, %arg1, %arg5, %arg3, %arg3, %arg3 :
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(f32, f32, vector<4xf32>,
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i32, i32, i32) -> vector<4xf32>
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// CHECK: call <16 x float> @llvm.amdgcn.mfma.f32.32x32x2f32(float %{{.*}}, float %{{.*}}, <16 x float> %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}})
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%r4= rocdl.mfma.f32.32x32x2f32 %arg0, %arg1, %arg4, %arg3, %arg3, %arg3 :
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(f32, f32, vector<16 x f32>,
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i32, i32, i32) -> vector<16 x f32>
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// CHECK: call <32 x float> @llvm.amdgcn.mfma.f32.32x32x4f16(<4 x half> %{{.*}}, <4 x half> %{{.*}}, <32 x float> %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}})
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%r5 = rocdl.mfma.f32.32x32x4f16 %arg6, %arg6, %arg2, %arg3, %arg3, %arg3 :
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(vector<4xf16>, vector<4xf16>, vector<32 x f32>,
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i32, i32, i32) -> vector<32 x f32>
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// CHECK: call <16 x float> @llvm.amdgcn.mfma.f32.16x16x4f16(<4 x half> %{{.*}}, <4 x half> %{{.*}}, <16 x float> %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}})
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%r6 = rocdl.mfma.f32.16x16x4f16 %arg6, %arg6, %arg4, %arg3, %arg3, %arg3 :
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(vector<4xf16>, vector<4xf16>, vector<16 x f32>,
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i32, i32, i32) -> vector<16 x f32>
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// CHECK: call <4 x float> @llvm.amdgcn.mfma.f32.4x4x4f16(<4 x half> %{{.*}}, <4 x half> %{{.*}}, <4 x float> %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}})
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%r7 = rocdl.mfma.f32.4x4x4f16 %arg6, %arg6, %arg5, %arg3, %arg3, %arg3 :
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(vector<4xf16>, vector<4xf16>, vector<4xf32>,
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i32, i32, i32) -> vector<4xf32>
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// CHECK: call <16 x float> @llvm.amdgcn.mfma.f32.32x32x8f16(<4 x half> %{{.*}}, <4 x half> %{{.*}}, <16 x float> %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}})
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%r8 = rocdl.mfma.f32.32x32x8f16 %arg6, %arg6, %arg4, %arg3, %arg3, %arg3 :
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(vector<4xf16>, vector<4xf16>, vector<16 x f32>,
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i32, i32, i32) -> vector<16 x f32>
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// CHECK: call <4 x float> @llvm.amdgcn.mfma.f32.16x16x16f16(<4 x half> %{{.*}}, <4 x half> %{{.*}}, <4 x float> %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}})
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%r9 = rocdl.mfma.f32.16x16x16f16 %arg6, %arg6, %arg5, %arg3, %arg3, %arg3 :
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(vector<4xf16>, vector<4xf16>, vector<4xf32>,
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i32, i32, i32) -> vector<4xf32>
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// CHECK: call <32 x i32> @llvm.amdgcn.mfma.i32.32x32x4i8(i32 %{{.*}}, i32 %{{.*}}, <32 x i32> %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}})
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%r10 = rocdl.mfma.i32.32x32x4i8 %arg3, %arg3, %arg7, %arg3, %arg3, %arg3 :
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(i32, i32, vector<32 x i32>,
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i32, i32, i32) -> vector<32 x i32>
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// CHECK: call <16 x i32> @llvm.amdgcn.mfma.i32.16x16x4i8(i32 %{{.*}}, i32 %{{.*}}, <16 x i32> %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}})
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%r11 = rocdl.mfma.i32.16x16x4i8 %arg3, %arg3, %arg8, %arg3, %arg3, %arg3 :
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(i32, i32, vector<16 x i32>,
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i32, i32, i32) -> vector<16 x i32>
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// CHECK: call <4 x i32> @llvm.amdgcn.mfma.i32.4x4x4i8(i32 %{{.*}}, i32 %{{.*}}, <4 x i32> %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}})
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%r12 = rocdl.mfma.i32.4x4x4i8 %arg3, %arg3, %arg9, %arg3, %arg3, %arg3 :
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(i32, i32, vector<4xi32>,
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i32, i32, i32) -> vector<4xi32>
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// CHECK: call <16 x i32> @llvm.amdgcn.mfma.i32.32x32x8i8(i32 %{{.*}}, i32 %{{.*}}, <16 x i32> %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}})
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%r13 = rocdl.mfma.i32.32x32x8i8 %arg3, %arg3, %arg8, %arg3, %arg3, %arg3 :
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(i32, i32, vector<16 x i32>,
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i32, i32, i32) -> vector<16 x i32>
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// CHECK: call <4 x i32> @llvm.amdgcn.mfma.i32.16x16x16i8(i32 %{{.*}}, i32 %{{.*}}, <4 x i32> %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}})
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%r14 = rocdl.mfma.i32.16x16x16i8 %arg3, %arg3, %arg9, %arg3, %arg3, %arg3 :
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(i32, i32, vector<4xi32>,
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i32, i32, i32) -> vector<4xi32>
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// CHECK: call <32 x float> @llvm.amdgcn.mfma.f32.32x32x2bf16(<2 x i16> %{{.*}}, <2 x i16> %{{.*}}, <32 x float> %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}})
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%r15 = rocdl.mfma.f32.32x32x2bf16 %arg10, %arg10, %arg2, %arg3, %arg3, %arg3 :
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(vector<2xi16>, vector<2xi16>, vector<32 x f32>,
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i32, i32, i32) -> vector<32 x f32>
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// CHECK: call <16 x float> @llvm.amdgcn.mfma.f32.16x16x2bf16(<2 x i16> %{{.*}}, <2 x i16> %{{.*}}, <16 x float> %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}})
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%r16 = rocdl.mfma.f32.16x16x2bf16 %arg10, %arg10, %arg4, %arg3, %arg3, %arg3 :
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(vector<2xi16>, vector<2xi16>, vector<16 x f32>,
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i32, i32, i32) -> vector<16 x f32>
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// CHECK: call <4 x float> @llvm.amdgcn.mfma.f32.4x4x2bf16(<2 x i16> %{{.*}}, <2 x i16> %{{.*}}, <4 x float> %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}})
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%r17 = rocdl.mfma.f32.4x4x2bf16 %arg10, %arg10, %arg5, %arg3, %arg3, %arg3 :
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(vector<2xi16>, vector<2xi16>, vector<4xf32>,
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i32, i32, i32) -> vector<4xf32>
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// CHECK: call <16 x float> @llvm.amdgcn.mfma.f32.32x32x4bf16(<2 x i16> %{{.*}}, <2 x i16> %{{.*}}, <16 x float> %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}})
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%r18 = rocdl.mfma.f32.32x32x4bf16 %arg10, %arg10, %arg4, %arg3, %arg3, %arg3 :
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(vector<2xi16>, vector<2xi16>, vector<16 x f32>,
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i32, i32, i32) -> vector<16 x f32>
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// CHECK: call <4 x float> @llvm.amdgcn.mfma.f32.16x16x8bf16(<2 x i16> %{{.*}}, <2 x i16> %{{.*}}, <4 x float> %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}})
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%r19 = rocdl.mfma.f32.16x16x8bf16 %arg10, %arg10, %arg5, %arg3, %arg3, %arg3 :
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(vector<2xi16>, vector<2xi16>, vector<4xf32>,
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i32, i32, i32) -> vector<4xf32>
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llvm.return %r0 : vector<32 x f32>
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}
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llvm.func @rocdl.mubuf(%rsrc : vector<4xi32>, %vindex : i32,
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%offset : i32, %glc : i1,
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%slc : i1, %vdata1 : vector<1xf32>,
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%vdata2 : vector<2xf32>, %vdata4 : vector<4xf32>) {
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// CHECK-LABEL: rocdl.mubuf
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// CHECK: call <1 x float> @llvm.amdgcn.buffer.load.v1f32(<4 x i32> %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i1 %{{.*}}, i1 %{{.*}})
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%r1 = rocdl.buffer.load %rsrc, %vindex, %offset, %glc, %slc : vector<1xf32>
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// CHECK: call <2 x float> @llvm.amdgcn.buffer.load.v2f32(<4 x i32> %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i1 %{{.*}}, i1 %{{.*}})
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%r2 = rocdl.buffer.load %rsrc, %vindex, %offset, %glc, %slc : vector<2xf32>
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// CHECK: call <4 x float> @llvm.amdgcn.buffer.load.v4f32(<4 x i32> %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i1 %{{.*}}, i1 %{{.*}})
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%r4 = rocdl.buffer.load %rsrc, %vindex, %offset, %glc, %slc : vector<4xf32>
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// CHECK: call void @llvm.amdgcn.buffer.store.v1f32(<1 x float> %{{.*}}, <4 x i32> %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i1 %{{.*}}, i1 %{{.*}})
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rocdl.buffer.store %vdata1, %rsrc, %vindex, %offset, %glc, %slc : vector<1xf32>
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// CHECK: call void @llvm.amdgcn.buffer.store.v2f32(<2 x float> %{{.*}}, <4 x i32> %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i1 %{{.*}}, i1 %{{.*}})
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rocdl.buffer.store %vdata2, %rsrc, %vindex, %offset, %glc, %slc : vector<2xf32>
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// CHECK: call void @llvm.amdgcn.buffer.store.v4f32(<4 x float> %{{.*}}, <4 x i32> %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i1 %{{.*}}, i1 %{{.*}})
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rocdl.buffer.store %vdata4, %rsrc, %vindex, %offset, %glc, %slc : vector<4xf32>
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llvm.return
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}
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