forked from OSchip/llvm-project
57 lines
2.4 KiB
MLIR
57 lines
2.4 KiB
MLIR
// RUN: mlir-opt -verify-diagnostics %s | mlir-opt | mlir-translate --arm-sve-mlir-to-llvmir | FileCheck %s
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// CHECK-LABEL: define <vscale x 4 x i32> @arm_sve_sdot
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llvm.func @arm_sve_sdot(%arg0: !llvm.vec<?x16 x i8>,
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%arg1: !llvm.vec<?x16 x i8>,
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%arg2: !llvm.vec<?x4 x i32>)
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-> !llvm.vec<?x4 x i32> {
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// CHECK: call <vscale x 4 x i32> @llvm.aarch64.sve.sdot.nxv4i32(<vscale x 4
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%0 = "llvm_arm_sve.sdot"(%arg2, %arg0, %arg1) :
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(!llvm.vec<?x4 x i32>, !llvm.vec<?x16 x i8>, !llvm.vec<?x16 x i8>)
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-> !llvm.vec<?x4 x i32>
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llvm.return %0 : !llvm.vec<?x4 x i32>
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}
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// CHECK-LABEL: define <vscale x 4 x i32> @arm_sve_smmla
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llvm.func @arm_sve_smmla(%arg0: !llvm.vec<?x16 x i8>,
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%arg1: !llvm.vec<?x16 x i8>,
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%arg2: !llvm.vec<?x4 x i32>)
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-> !llvm.vec<?x4 x i32> {
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// CHECK: call <vscale x 4 x i32> @llvm.aarch64.sve.smmla.nxv4i32(<vscale x 4
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%0 = "llvm_arm_sve.smmla"(%arg2, %arg0, %arg1) :
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(!llvm.vec<?x4 x i32>, !llvm.vec<?x16 x i8>, !llvm.vec<?x16 x i8>)
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-> !llvm.vec<?x4 x i32>
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llvm.return %0 : !llvm.vec<?x4 x i32>
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}
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// CHECK-LABEL: define <vscale x 4 x i32> @arm_sve_udot
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llvm.func @arm_sve_udot(%arg0: !llvm.vec<?x16 x i8>,
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%arg1: !llvm.vec<?x16 x i8>,
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%arg2: !llvm.vec<?x4 x i32>)
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-> !llvm.vec<?x4 x i32> {
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// CHECK: call <vscale x 4 x i32> @llvm.aarch64.sve.udot.nxv4i32(<vscale x 4
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%0 = "llvm_arm_sve.udot"(%arg2, %arg0, %arg1) :
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(!llvm.vec<?x4 x i32>, !llvm.vec<?x16 x i8>, !llvm.vec<?x16 x i8>)
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-> !llvm.vec<?x4 x i32>
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llvm.return %0 : !llvm.vec<?x4 x i32>
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}
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// CHECK-LABEL: define <vscale x 4 x i32> @arm_sve_ummla
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llvm.func @arm_sve_ummla(%arg0: !llvm.vec<?x16 x i8>,
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%arg1: !llvm.vec<?x16 x i8>,
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%arg2: !llvm.vec<?x4 x i32>)
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-> !llvm.vec<?x4 x i32> {
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// CHECK: call <vscale x 4 x i32> @llvm.aarch64.sve.ummla.nxv4i32(<vscale x 4
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%0 = "llvm_arm_sve.ummla"(%arg2, %arg0, %arg1) :
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(!llvm.vec<?x4 x i32>, !llvm.vec<?x16 x i8>, !llvm.vec<?x16 x i8>)
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-> !llvm.vec<?x4 x i32>
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llvm.return %0 : !llvm.vec<?x4 x i32>
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}
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// CHECK-LABEL: define i64 @get_vector_scale()
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llvm.func @get_vector_scale() -> i64 {
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// CHECK: call i64 @llvm.vscale.i64()
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%0 = "llvm_arm_sve.vscale"() : () -> i64
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llvm.return %0 : i64
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}
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