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llvm-project/llvm/lib/Target/AMDGPU
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Matt Arsenault 24692118ba AMDGPU: Avoid using 64-bit shift for i64 (shl x, 32) 
This can be done only with moves which theoretically
will optimize better later.

Although this transform increases the instruction count,
it should be code size / cycle count neutral in the worst
VALU case. It also seems to slightly improve a couple
of testcases due to other DAG combines this exposes.

This is probably slightly worse for the SALU case, so
it might be better to handle this during moveToVALU,
although then you lose some simplifications like
the load width reducing in the simple testcase.

llvm-svn: 242177
 		2015-07-14 18:20:33 +00:00
..
AsmParser Reverting r241058 because it's causing buildbot failures. 2015-06-30 12:32:53 +00:00
InstPrinter AMDGPU: s/R600/AMDGPU/ in the Makefiles 2015-06-13 05:11:14 +00:00
MCTargetDesc MC: Remove MCSubtargetInfo() default constructor 2015-07-10 22:43:42 +00:00
TargetInfo AMDGPU: s/R600/AMDGPU/ in the Makefiles 2015-06-13 05:11:14 +00:00
Utils AMDGPU/SI: Update amd_kernel_code_t definition and add assembler support 2015-06-26 21:58:31 +00:00
AMDGPU.h R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
AMDGPU.td AMDGPU/SI: Add debugging subtarget feature for DS offsets 2015-07-06 16:01:58 +00:00
AMDGPUAlwaysInlinePass.cpp AMDGPU: Minor cleanups to always inline pass 2015-07-13 19:08:36 +00:00
AMDGPUAsmPrinter.cpp AMDGPU/SI: Update amd_kernel_code_t definition and add assembler support 2015-06-26 21:58:31 +00:00
AMDGPUAsmPrinter.h AMDGPU/SI: Emit amd_kernel_code_t in EmitFunctionBodyStart() 2015-06-26 21:14:58 +00:00
AMDGPUCallingConv.td R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
AMDGPUFrameLowering.cpp R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
AMDGPUFrameLowering.h R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
AMDGPUISelDAGToDAG.cpp AMDGPU/SI: Select mad patterns to v_mac_f32 2015-07-13 15:47:57 +00:00
AMDGPUISelLowering.cpp AMDGPU: Avoid using 64-bit shift for i64 (shl x, 32) 2015-07-14 18:20:33 +00:00
AMDGPUISelLowering.h AMDGPU: Avoid using 64-bit shift for i64 (shl x, 32) 2015-07-14 18:20:33 +00:00
AMDGPUInstrInfo.cpp R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
AMDGPUInstrInfo.h Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
AMDGPUInstrInfo.td R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
AMDGPUInstructions.td R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
AMDGPUIntrinsicInfo.cpp R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
AMDGPUIntrinsicInfo.h R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
AMDGPUIntrinsics.td R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
AMDGPUMCInstLower.cpp R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
AMDGPUMCInstLower.h R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
AMDGPUMachineFunction.cpp R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
AMDGPUMachineFunction.h Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
AMDGPUPromoteAlloca.cpp R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
AMDGPURegisterInfo.cpp R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
AMDGPURegisterInfo.h R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
AMDGPURegisterInfo.td R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
AMDGPUSubtarget.cpp AMDGPU/SI: Add debugging subtarget feature for DS offsets 2015-07-06 16:01:58 +00:00
AMDGPUSubtarget.h AMDGPU/SI: Add debugging subtarget feature for DS offsets 2015-07-06 16:01:58 +00:00
AMDGPUTargetMachine.cpp AMDGPU/SI: Fix read2 merging into a super register. 2015-07-14 17:57:36 +00:00
AMDGPUTargetMachine.h R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
AMDGPUTargetTransformInfo.cpp R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
AMDGPUTargetTransformInfo.h Make TargetTransformInfo keeping a reference to the Module DataLayout 2015-07-09 02:08:42 +00:00
AMDILCFGStructurizer.cpp R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
AMDKernelCodeT.h AMDGPU/SI: Update amd_kernel_code_t definition and add assembler support 2015-06-26 21:58:31 +00:00
CIInstructions.td R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
CMakeLists.txt AMDGPU/SI: Add hsa code object directives 2015-06-26 21:15:07 +00:00
CaymanInstructions.td R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
EvergreenInstructions.td R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
LLVMBuild.txt AMDGPU/SI: Add hsa code object directives 2015-06-26 21:15:07 +00:00
Makefile AMDGPU/SI: Add hsa code object directives 2015-06-26 21:15:07 +00:00
Processors.td AMDGPU/SI: Add hsa code object directives 2015-06-26 21:15:07 +00:00
R600ClauseMergePass.cpp R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
R600ControlFlowFinalizer.cpp R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
R600Defines.h Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
R600EmitClauseMarkers.cpp R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
R600ExpandSpecialInstrs.cpp R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
R600ISelLowering.cpp AMDGPU: Add helper function for implicit parameter offsets. 2015-07-09 21:20:37 +00:00
R600ISelLowering.h Make TargetLowering::getPointerTy() taking DataLayout as an argument 2015-07-09 02:09:04 +00:00
R600InstrFormats.td R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
R600InstrInfo.cpp Replace copy-pasted debug value skipping with MBB::getLastNonDebugInstr 2015-06-25 13:28:24 +00:00
R600InstrInfo.h Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
R600Instructions.td R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
R600Intrinsics.td R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
R600MachineFunctionInfo.cpp R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
R600MachineFunctionInfo.h Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
R600MachineScheduler.cpp R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
R600MachineScheduler.h R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
R600OptimizeVectorRegisters.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
R600Packetizer.cpp R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
R600RegisterInfo.cpp R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
R600RegisterInfo.h R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
R600RegisterInfo.td R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
R600Schedule.td R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
R600TextureIntrinsicsReplacer.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
R700Instructions.td R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
SIAnnotateControlFlow.cpp R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
SIDefines.h AMDGPU/SI: Update amd_kernel_code_t definition and add assembler support 2015-06-26 21:58:31 +00:00
SIFixControlFlowLiveIntervals.cpp R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
SIFixSGPRCopies.cpp R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
SIFixSGPRLiveRanges.cpp R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
SIFoldOperands.cpp AMDGPU/SI: Select mad patterns to v_mac_f32 2015-07-13 15:47:57 +00:00
SIISelLowering.cpp AMDGPU: Fix chains for memory ops dependent on argument loads 2015-07-10 22:51:36 +00:00
SIISelLowering.h Re-instate the EVT parameter to getScalarShiftAmountTy() for OOT user 2015-07-09 15:12:23 +00:00
SIInsertWaits.cpp R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
SIInstrFormats.td R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
SIInstrInfo.cpp AMDGPU/SI: Fix read2 merging into a super register. 2015-07-14 17:57:36 +00:00
SIInstrInfo.h AMDGPU/SI: Select mad patterns to v_mac_f32 2015-07-13 15:47:57 +00:00
SIInstrInfo.td AMDGPU/SI: Select mad patterns to v_mac_f32 2015-07-13 15:47:57 +00:00
SIInstructions.td AMDGPU/SI: Select mad patterns to v_mac_f32 2015-07-13 15:47:57 +00:00
SIIntrinsics.td R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
SILoadStoreOptimizer.cpp AMDGPU/SI: Fix read2 merging into a super register. 2015-07-14 17:57:36 +00:00
SILowerControlFlow.cpp R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
SILowerI1Copies.cpp R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
SIMachineFunctionInfo.cpp MachineRegisterInfo: Remove UsedPhysReg infrastructure 2015-07-14 17:52:07 +00:00
SIMachineFunctionInfo.h R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
SIPrepareScratchRegs.cpp MachineRegisterInfo: Remove UsedPhysReg infrastructure 2015-07-14 17:52:07 +00:00
SIRegisterInfo.cpp MachineRegisterInfo: Remove UsedPhysReg infrastructure 2015-07-14 17:52:07 +00:00
SIRegisterInfo.h R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
SIRegisterInfo.td R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
SISchedule.td R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
SIShrinkInstructions.cpp AMDGPU/SI: Add support for shrinking v_cndmask_b32_e32 instructions 2015-07-14 14:15:03 +00:00
SITypeRewriter.cpp R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
VIInstrFormats.td R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
VIInstructions.td R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00