llvm-project/llvm/test/CodeGen
Graham Sellers ba559ac058 [AMDGPU] Split 64-Bit XNOR to 64-Bit NOT/XOR
The identity ~(x ^ y) == (~x ^ y) == (x ^ ~y) allows XNOR (XOR/NOT) to turn into NOT/XOR. Handling this case with its own split means we can make the NOT remain in the scalar unit. Previously, we split 64-bit XNOR into two 32-bit XNOR, then lowered. Now, we get three instructions (s_not, v_xor, v_xor) rather than four in the case where either of the sources is a scalar 64-bit.

Add test cases to xnor.ll to attempt XNOR Vx, Sy and XNOR Sx, Vy. Also adding test that uses the opposite identity such that (~x ^ y) on the scalar unit (or vector for gfx906) can generate XNOR. This already worked, but I didn't see a test for it.

Differential: https://reviews.llvm.org/D55071
llvm-svn: 348075
2018-12-01 12:27:53 +00:00
..
AArch64 [MachineOutliner] Outline both register save calls + no LR save calls together 2018-11-30 21:14:58 +00:00
AMDGPU [AMDGPU] Split 64-Bit XNOR to 64-Bit NOT/XOR 2018-12-01 12:27:53 +00:00
ARC
ARM [ARM] Don't expand sdiv when optimising for minsize 2018-11-30 08:14:28 +00:00
AVR [AVR] Reorder the CHECK lines in directmem.ll to match current trunk 2018-11-09 23:17:59 +00:00
BPF
Generic Moved dag-combine-select-undef.ll into amdgpu. NFC. 2018-11-17 00:17:15 +00:00
Hexagon [Hexagon] make test immune to improvements in undef simplification 2018-11-19 15:34:09 +00:00
Inputs
Lanai
MIR [CodeGen] Fix bugs in BranchFolderPass when debug labels are generated. 2018-11-30 08:07:29 +00:00
MSP430 [MSP430] Optimize srl/sra in case of A >> (8 + N) 2018-11-19 10:43:02 +00:00
Mips [TargetLowering] expandFP_TO_UINT - improve fp16 support 2018-11-19 19:16:13 +00:00
NVPTX [NVPTX] Add lowering of i128 numbers as struct fields 2018-12-01 00:21:52 +00:00
Nios2
PowerPC [PowerPC] Fix a conversion is not considered when the ISD::BR_CC node making the instruction selection 2018-11-29 03:04:39 +00:00
RISCV [RISCV] Remove RV64I SLLW/SRLW/SRAW patterns and add new test cases 2018-12-01 05:00:00 +00:00
SPARC Relax fast register allocator related test cases; NFC 2018-10-29 20:10:42 +00:00
SystemZ [SystemZ] make test immune to improvements in undef simplification 2018-11-18 16:50:44 +00:00
Thumb [SelectionDAG] swap select_cc operands to enable folding 2018-11-09 11:09:40 +00:00
Thumb2 [ARM] Enable spilling of the hGPR register class in Thumb2 2018-11-08 13:02:10 +00:00
WebAssembly [WebAssembly] WebAssemblyLowerEmscriptenEHSjLj: use getter/setter for accessing tempRet0 2018-11-20 19:25:07 +00:00
WinCFGuard
WinEH
X86 [SelectionDAG] Improve SimplifyDemandedBits to SimplifyDemandedVectorElts simplification 2018-12-01 12:08:55 +00:00
XCore Relax fast register allocator related test cases; NFC 2018-10-29 20:10:42 +00:00