forked from OSchip/llvm-project
152 lines
4.1 KiB
LLVM
152 lines
4.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -newgvn -S | FileCheck %s
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define float @_Z1if(float %p) {
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; CHECK-LABEL: @_Z1if(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[P_ADDR:%.*]] = alloca float, align 4
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; CHECK-NEXT: store float [[P:%.*]], float* [[P_ADDR]], align 4
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; CHECK-NEXT: [[CMP:%.*]] = fcmp ueq float [[P]], 3.000000e+00
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; CHECK-NEXT: call void @llvm.assume(i1 [[CMP]])
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; CHECK-NEXT: ret float [[P]]
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;
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entry:
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%p.addr = alloca float, align 4
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store float %p, float* %p.addr, align 4
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%0 = load float, float* %p.addr, align 4
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%cmp = fcmp ueq float %0, 3.000000e+00 ; no nnan flag - can't propagate
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call void @llvm.assume(i1 %cmp)
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ret float %0
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}
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; This test checks if constant propagation works for multiple node edges
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define i32 @_Z1ii(i32 %p) {
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; CHECK-LABEL: @_Z1ii(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[P:%.*]], 42
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; CHECK-NEXT: call void @llvm.assume(i1 [[CMP]])
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; CHECK-NEXT: br i1 true, label [[BB2:%.*]], label [[BB2]]
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; CHECK: bb2:
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; CHECK-NEXT: br i1 true, label [[BB2]], label [[BB2]]
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; CHECK: 0:
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; CHECK-NEXT: store i8 undef, i8* null, align 1
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; CHECK-NEXT: ret i32 [[P]]
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;
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entry:
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%cmp = icmp eq i32 %p, 42
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call void @llvm.assume(i1 %cmp)
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br i1 %cmp, label %bb2, label %bb2
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bb2:
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call void @llvm.assume(i1 true)
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br i1 %cmp, label %bb2, label %bb2
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ret i32 %p
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}
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define i32 @_Z1ij(i32 %p) {
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; CHECK-LABEL: @_Z1ij(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[P:%.*]], 42
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; CHECK-NEXT: call void @llvm.assume(i1 [[CMP]])
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; CHECK-NEXT: br i1 true, label [[BB2:%.*]], label [[BB2]]
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; CHECK: bb2:
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; CHECK-NEXT: call void @llvm.assume(i1 true)
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; CHECK-NEXT: br i1 true, label [[TMP0:%.*]], label [[BB2]]
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; CHECK: 0:
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; CHECK-NEXT: ret i32 42
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;
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entry:
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%cmp = icmp eq i32 %p, 42
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call void @llvm.assume(i1 %cmp)
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br i1 %cmp, label %bb2, label %bb2
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bb2:
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%cmp2 = icmp eq i32 %p, 42
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call void @llvm.assume(i1 %cmp2)
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br i1 %cmp, label %0, label %bb2
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ret i32 %p
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}
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define i32 @_Z1ik(i32 %p) {
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; CHECK-LABEL: @_Z1ik(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[P:%.*]], 42
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; CHECK-NEXT: call void @llvm.assume(i1 [[CMP]])
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; CHECK-NEXT: br i1 true, label [[BB2:%.*]], label [[BB3:%.*]]
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; CHECK: bb2:
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; CHECK-NEXT: call void @llvm.assume(i1 false)
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; CHECK-NEXT: ret i32 15
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; CHECK: bb3:
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; CHECK-NEXT: store i8 undef, i8* null, align 1
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; CHECK-NEXT: ret i32 17
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;
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entry:
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%cmp = icmp eq i32 %p, 42
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call void @llvm.assume(i1 %cmp)
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br i1 %cmp, label %bb2, label %bb3
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bb2:
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%cmp3 = icmp eq i32 %p, 43
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call void @llvm.assume(i1 %cmp3)
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ret i32 15
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bb3:
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ret i32 17
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}
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; This test checks if GVN can do the constant propagation correctly
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; when there are multiple uses of the same assume value in the
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; basic block that has a loop back-edge pointing to itself.
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define i32 @_Z1il(i32 %val, i1 %k) {
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; CHECK-LABEL: @_Z1il(
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; CHECK-NEXT: br label [[NEXT:%.*]]
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; CHECK: next:
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; CHECK-NEXT: tail call void @llvm.assume(i1 [[K:%.*]])
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; CHECK-NEXT: tail call void @llvm.assume(i1 true)
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[VAL:%.*]], 50
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; CHECK-NEXT: br i1 [[CMP]], label [[NEXT]], label [[MEH:%.*]]
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; CHECK: meh:
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; CHECK-NEXT: ret i32 0
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;
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br label %next
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next:
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tail call void @llvm.assume(i1 %k)
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tail call void @llvm.assume(i1 %k)
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%cmp = icmp eq i32 %val, 50
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br i1 %cmp, label %next, label %meh
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meh:
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ret i32 0
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}
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; This test checks if GVN can prevent the constant propagation correctly
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; in the successor blocks that are not dominated by the basic block
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; with the assume instruction.
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define i1 @_z1im(i32 %val, i1 %k, i1 %j) {
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; CHECK-LABEL: @_z1im(
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; CHECK-NEXT: br i1 [[J:%.*]], label [[NEXT:%.*]], label [[MEH:%.*]]
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; CHECK: next:
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; CHECK-NEXT: tail call void @llvm.assume(i1 [[K:%.*]])
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; CHECK-NEXT: tail call void @llvm.assume(i1 true)
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; CHECK-NEXT: br label [[MEH]]
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; CHECK: meh:
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; CHECK-NEXT: ret i1 [[K]]
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;
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br i1 %j, label %next, label %meh
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next:
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tail call void @llvm.assume(i1 %k)
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tail call void @llvm.assume(i1 %k)
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br label %meh
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meh:
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ret i1 %k
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}
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declare void @llvm.assume(i1)
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