forked from OSchip/llvm-project
88 lines
2.7 KiB
LLVM
88 lines
2.7 KiB
LLVM
; RUN: opt -S -early-cse -earlycse-debug-hash < %s | FileCheck %s
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; RUN: opt < %s -S -basic-aa -early-cse-memssa | FileCheck %s
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; NOTE: This file is testing the current implementation. Some of
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; the transforms used as negative tests below would be legal, but
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; only if reached through a chain of logic which EarlyCSE is incapable
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; of performing. To say it differently, this file tests a conservative
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; version of the memory model. If we want to extend EarlyCSE to be more
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; aggressive in the future, we may need to relax some of the negative tests.
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; We can value forward across the fence since we can (semantically)
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; reorder the following load before the fence.
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define i32 @test(i32* %addr.i) {
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; CHECK-LABEL: @test
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; CHECK: store
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; CHECK: fence
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; CHECK-NOT: load
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; CHECK: ret
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store i32 5, i32* %addr.i, align 4
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fence release
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%a = load i32, i32* %addr.i, align 4
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ret i32 %a
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}
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; Same as above
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define i32 @test2(i32* noalias %addr.i, i32* noalias %otheraddr) {
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; CHECK-LABEL: @test2
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; CHECK: load
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; CHECK: fence
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; CHECK-NOT: load
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; CHECK: ret
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%a = load i32, i32* %addr.i, align 4
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fence release
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%a2 = load i32, i32* %addr.i, align 4
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%res = sub i32 %a, %a2
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ret i32 %a
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}
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; We can not value forward across an acquire barrier since we might
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; be syncronizing with another thread storing to the same variable
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; followed by a release fence. If this thread observed the release
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; had happened, we must present a consistent view of memory at the
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; fence. Note that it would be legal to reorder '%a' after the fence
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; and then remove '%a2'. The current implementation doesn't know how
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; to do this, but if it learned, this test will need revised.
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define i32 @test3(i32* noalias %addr.i, i32* noalias %otheraddr) {
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; CHECK-LABEL: @test3
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; CHECK: load
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; CHECK: fence
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; CHECK: load
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; CHECK: sub
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; CHECK: ret
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%a = load i32, i32* %addr.i, align 4
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fence acquire
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%a2 = load i32, i32* %addr.i, align 4
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%res = sub i32 %a, %a2
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ret i32 %res
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}
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; We can not dead store eliminate accross the fence. We could in
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; principal reorder the second store above the fence and then DSE either
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; store, but this is beyond the simple last-store DSE which EarlyCSE
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; implements.
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define void @test4(i32* %addr.i) {
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; CHECK-LABEL: @test4
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; CHECK: store
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; CHECK: fence
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; CHECK: store
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; CHECK: ret
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store i32 5, i32* %addr.i, align 4
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fence release
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store i32 5, i32* %addr.i, align 4
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ret void
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}
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; We *could* DSE across this fence, but don't. No other thread can
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; observe the order of the acquire fence and the store.
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define void @test5(i32* %addr.i) {
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; CHECK-LABEL: @test5
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; CHECK: store
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; CHECK: fence
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; CHECK: store
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; CHECK: ret
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store i32 5, i32* %addr.i, align 4
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fence acquire
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store i32 5, i32* %addr.i, align 4
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ret void
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}
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