llvm-project/llvm/test/CodeGen
Simon Pilgrim b5ef56f0bc [X86][AVX] Add missing X86ISD::VBROADCAST(v4f32 -> v8f32) isel pattern for AVX1 targets
D109434 addressed the v2f64 -> v4f64 case, an internal test has found an equivalent crash for the v4f32 -> v8f32 case.
2021-11-07 12:59:35 +00:00
..
AArch64 [DAGCombiner] add fold for vselect based on mask of signbit, part 2 2021-11-05 15:02:12 -04:00
AMDGPU [AMDGPU] Changes the AMDGPU_Gfx calling convention by making the SGPRs 4..29 callee-save. This is to avoid superfluous s_movs when executing amdgpu_gfx function calls as the callee is likely not going to change the argument values. 2021-11-04 21:50:18 +01:00
ARC
ARM [TwoAddressInstructionPass] Update existing physreg live intervals 2021-11-05 21:20:30 +00:00
AVR [TwoAddressInstructionPass] Improve the SrcRegMap and DstRegMap computation 2021-10-11 15:28:31 -07:00
BPF BPF: Support btf_type_tag attribute 2021-11-04 17:01:36 -07:00
CSKY [CSKY] First patch to construct codegen infra and generate first add instruction 2021-11-01 10:06:56 +08:00
Generic [AIX] Disable tests failing due to lack of .loc and .file directive support 2021-10-08 11:55:12 -04:00
Hexagon [Hexagon] Add machine verification to some tests 2021-11-02 15:41:30 +00:00
Inputs
Lanai
M68k
MIR DebugInfo: Use clang's preferred names for integer types 2021-10-06 16:02:34 -07:00
MSP430 [llvm-readobj] Support dumping of MSP430 ELF attributes 2021-09-28 00:56:11 +03:00
Mips [SelectionDAG] Optimize expansion for rotates/funnel shifts 2021-11-02 11:38:25 +00:00
NVPTX [NVPTX] Mark special registers as reserved 2021-11-03 15:48:04 +03:00
PowerPC [FreeBSD] Do not mark __stack_chk_guard as dso_local 2021-11-05 07:29:50 -05:00
RISCV [RISCV] Support Zfhmin extension 2021-11-06 01:41:02 +08:00
SPARC [SparcISelLowering] avoid emitting libcalls to __muloti4 and __mulodi4 2021-10-29 13:14:09 -07:00
SystemZ [SystemZ] Improvement of emitMemMemWrapper() 2021-10-26 17:03:01 +02:00
Thumb [TwoAddressInstructionPass] Update existing physreg live intervals 2021-11-05 21:20:30 +00:00
Thumb2 [DAGCombiner] add fold for vselect based on mask of signbit, part 2 2021-11-05 15:02:12 -04:00
VE [VE][NFC] correct bitmasking in popcnt expansion test 2021-10-25 13:55:58 +02:00
WebAssembly [WebAssembly] Add prototype relaxed float to int trunc instructions 2021-10-28 14:01:53 -07:00
WinCFGuard
WinEH
X86 [X86][AVX] Add missing X86ISD::VBROADCAST(v4f32 -> v8f32) isel pattern for AVX1 targets 2021-11-07 12:59:35 +00:00
XCore