Chen Zheng 1e0b6c1df0 [LSR] ignore profitable chain when reg num is not major cost. ... Reviewed By: samparker Differential Revision: https://reviews.llvm.org/D89665		2020-10-23 09:35:48 -04:00
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AggressiveInstCombine	[AggressiveInstCombine] foldAnyOrAllBitsSet - add uniform vector support	2020-10-15 11:02:35 +01:00
CFGuard	[NFCI][IR] Introduce CallBase::Create() wrapper	2020-07-07 01:16:36 +03:00
Coroutines	[Coroutines] Refactor/Rewrite Spill and Alloca processing	2020-10-10 22:21:34 -07:00
Hello	…
HelloNew	Reland [docs][NewPM] Add docs for writing NPM passes	2020-09-14 16:06:19 -07:00
IPO	[SVE]Clarify TypeSize comparisons in llvm/lib/Transforms	2020-10-23 09:15:17 +01:00
InstCombine	[InstCombine] matchBSwapOrBitReverse - expose bswap/bitreverse matching flags.	2020-10-23 12:35:28 +01:00
Instrumentation	[PGO] Remove the old memop value profiling buckets.	2020-10-15 10:09:49 -07:00
ObjCARC	[ObjCARC] Initialize return value	2020-09-21 11:03:44 -07:00
Scalar	[LSR] ignore profitable chain when reg num is not major cost.	2020-10-23 09:35:48 -04:00
Utils	[SVE]Clarify TypeSize comparisons in llvm/lib/Transforms	2020-10-23 09:15:17 +01:00
Vectorize	Introduce CfgTraits abstraction	2020-10-20 13:50:52 +02:00
CMakeLists.txt	Reland [docs][NewPM] Add docs for writing NPM passes	2020-09-14 16:06:19 -07:00
LLVMBuild.txt	Reland [docs][NewPM] Add docs for writing NPM passes	2020-09-14 16:06:19 -07:00