.. |
AsmParser
|
[AMDGPU] Implement wave64 DWARF register mapping
|
2020-02-25 14:00:01 -05:00 |
Disassembler
|
[AMDGPU] Remove AMDGPURegisterInfo
|
2020-02-11 11:13:38 -08:00 |
MCTargetDesc
|
[MC] Add MCStreamer::emitInt{8,16,32,64}
|
2020-02-29 09:40:21 -08:00 |
TargetInfo
|
CMake: Make most target symbols hidden by default
|
2020-01-14 19:46:52 -08:00 |
Utils
|
[AMDGPU] Add a16 feature to gfx10
|
2020-02-10 09:04:23 +01:00 |
AMDGPU.h
|
AMDGPU/GlobalISel: Introduce post-legalize combiner
|
2020-02-24 22:12:12 -05:00 |
AMDGPU.td
|
[AMDGPU] Remove AMDGPURegisterInfo
|
2020-02-11 11:13:38 -08:00 |
AMDGPUAliasAnalysis.cpp
|
AMDGPU: Improve alias analysis for GDS
|
2019-07-17 11:22:19 +00:00 |
AMDGPUAliasAnalysis.h
|
…
|
|
AMDGPUAlwaysInlinePass.cpp
|
AMDGPU: Simplify getAddressSpace calls
|
2019-10-31 07:51:38 -07:00 |
AMDGPUAnnotateKernelFeatures.cpp
|
Use llvm::StringLiteral instead of StringRef in few places
|
2019-09-20 14:31:42 +00:00 |
AMDGPUAnnotateUniformValues.cpp
|
Sink all InitializePasses.h includes
|
2019-11-13 16:34:37 -08:00 |
AMDGPUArgumentUsageInfo.cpp
|
…
|
|
AMDGPUArgumentUsageInfo.h
|
AMDGPU: Fix Register copypaste error
|
2019-09-05 23:07:10 +00:00 |
AMDGPUAsmPrinter.cpp
|
[MC] Add MCStreamer::emitInt{8,16,32,64}
|
2020-02-29 09:40:21 -08:00 |
AMDGPUAsmPrinter.h
|
[AsmPrinter][MCStreamer] De-capitalize EmitInstruction and EmitCFI*
|
2020-02-13 22:08:55 -08:00 |
AMDGPUAtomicOptimizer.cpp
|
Sink all InitializePasses.h includes
|
2019-11-13 16:34:37 -08:00 |
AMDGPUCallLowering.cpp
|
AMDGPU/GlobalISel: Insert readfirstlane on SGPR returns
|
2020-03-10 11:18:48 -04:00 |
AMDGPUCallLowering.h
|
AMDGPU/GlobalISel: Improve handling of illegal return types
|
2020-03-09 13:11:30 -07:00 |
AMDGPUCallingConv.td
|
AMDGPU: Allow i16 shader arguments
|
2020-01-27 06:55:32 -08:00 |
AMDGPUCodeGenPrepare.cpp
|
[IRBuilder] Avoid passing IRBuilder by value; NFC
|
2020-02-17 18:14:47 +01:00 |
AMDGPUCombine.td
|
AMDGPU/GlobalISel: Introduce post-legalize combiner
|
2020-02-24 22:12:12 -05:00 |
AMDGPUFeatures.td
|
…
|
|
AMDGPUFixFunctionBitcasts.cpp
|
…
|
|
AMDGPUFrameLowering.cpp
|
Use Align for TFL::TransientStackAlignment
|
2019-10-21 08:31:25 +00:00 |
AMDGPUFrameLowering.h
|
[Alignment][NFC] Deprecate Align::None()
|
2020-01-24 12:53:58 +01:00 |
AMDGPUGISel.td
|
AMDGPU: Remove VOP3OpSelMods0 complex pattern
|
2020-03-04 17:18:22 -05:00 |
AMDGPUGenRegisterBankInfo.def
|
AMDGPU/GlobalISel: Fix RegBankSelect for G_INSERT_VECTOR_ELT
|
2020-01-22 10:57:50 -05:00 |
AMDGPUGlobalISelUtils.cpp
|
AMDGPU/GlobalISel: Select G_SHUFFLE_VECTOR
|
2020-02-21 13:35:40 -05:00 |
AMDGPUGlobalISelUtils.h
|
AMDGPU/GlobalISel: Select G_SHUFFLE_VECTOR
|
2020-02-21 13:35:40 -05:00 |
AMDGPUHSAMetadataStreamer.cpp
|
Make llvm::StringRef to std::string conversions explicit.
|
2020-01-28 23:25:25 +01:00 |
AMDGPUHSAMetadataStreamer.h
|
[llvm] Migrate llvm::make_unique to std::make_unique
|
2019-08-15 15:54:37 +00:00 |
AMDGPUISelDAGToDAG.cpp
|
AMDGPU: Remove VOP3OpSelMods0 complex pattern
|
2020-03-04 17:18:22 -05:00 |
AMDGPUISelLowering.cpp
|
AMDGPU: Make signext/zeroext behave more sensibly over > i32
|
2020-03-09 12:56:10 -07:00 |
AMDGPUISelLowering.h
|
AMDGPU: Make signext/zeroext behave more sensibly over > i32
|
2020-03-09 12:56:10 -07:00 |
AMDGPUInline.cpp
|
[Inliner] Inlining should honor nobuiltin attributes
|
2020-02-28 07:34:14 -08:00 |
AMDGPUInstrInfo.cpp
|
[AMDGPU] Remove AMDGPURegisterInfo
|
2020-02-11 11:13:38 -08:00 |
AMDGPUInstrInfo.h
|
…
|
|
AMDGPUInstrInfo.td
|
AMDGPU/GlobalISel: Select llvm.amdgcn.fdot2
|
2020-02-21 13:35:40 -05:00 |
AMDGPUInstructionSelector.cpp
|
AMDGPU/GlobalISel: Fix mishandling SGPR v2s16 add/sub/mul
|
2020-03-09 22:51:54 -04:00 |
AMDGPUInstructionSelector.h
|
AMDGPU: Remove VOP3OpSelMods0 complex pattern
|
2020-03-04 17:18:22 -05:00 |
AMDGPUInstructions.td
|
AMDGPU: Split denormal mode tracking bits
|
2020-02-04 10:44:21 -08:00 |
AMDGPULegalizerInfo.cpp
|
AMDGPU/GlobalISel: Refine G_TRUNC legality rules
|
2020-03-10 15:32:22 -07:00 |
AMDGPULegalizerInfo.h
|
AMDGPU/GlobalISel: Support llvm.trap and llvm.debugtrap intrinsics
|
2020-03-05 08:16:57 +05:30 |
AMDGPULibCalls.cpp
|
Make llvm::StringRef to std::string conversions explicit.
|
2020-01-28 23:25:25 +01:00 |
AMDGPULibFunc.cpp
|
Make llvm::StringRef to std::string conversions explicit.
|
2020-01-28 23:25:25 +01:00 |
AMDGPULibFunc.h
|
Make llvm::StringRef to std::string conversions explicit.
|
2020-01-28 23:25:25 +01:00 |
AMDGPULowerIntrinsics.cpp
|
AMDGPU: Add flag to control mem intrinsic expansion
|
2020-02-03 14:26:01 -08:00 |
AMDGPULowerKernelArguments.cpp
|
[Alignement][NFC] Deprecate untyped CreateAlignedLoad
|
2020-01-23 13:34:32 +01:00 |
AMDGPULowerKernelAttributes.cpp
|
…
|
|
AMDGPUMCInstLower.cpp
|
[AsmPrinter][MCStreamer] De-capitalize EmitInstruction and EmitCFI*
|
2020-02-13 22:08:55 -08:00 |
AMDGPUMachineCFGStructurizer.cpp
|
[AMDGPU] Fixes -Wrange-loop-analysis warnings
|
2019-12-22 19:39:28 +01:00 |
AMDGPUMachineFunction.cpp
|
AMDGPU: Refactor treatment of denormal mode
|
2019-11-19 19:55:43 +05:30 |
AMDGPUMachineFunction.h
|
AMDGPU: Refactor treatment of denormal mode
|
2019-11-19 19:55:43 +05:30 |
AMDGPUMachineModuleInfo.cpp
|
…
|
|
AMDGPUMachineModuleInfo.h
|
…
|
|
AMDGPUMacroFusion.cpp
|
…
|
|
AMDGPUMacroFusion.h
|
…
|
|
AMDGPUOpenCLEnqueuedBlockLowering.cpp
|
Avoid SmallString.h include in MD5.h, NFC
|
2020-02-26 09:10:24 -08:00 |
AMDGPUPTNote.h
|
…
|
|
AMDGPUPerfHintAnalysis.cpp
|
AMDGPU: Fix assert in clang test
|
2019-07-05 21:09:53 +00:00 |
AMDGPUPerfHintAnalysis.h
|
AMDGPU: Make AMDGPUPerfHintAnalysis an SCC pass
|
2019-07-05 20:26:13 +00:00 |
AMDGPUPostLegalizerCombiner.cpp
|
AMDGPU/GlobalISel: Introduce post-legalize combiner
|
2020-02-24 22:12:12 -05:00 |
AMDGPUPreLegalizerCombiner.cpp
|
AMDGPU/GlobalISel: Introduce post-legalize combiner
|
2020-02-24 22:12:12 -05:00 |
AMDGPUPrintfRuntimeBinding.cpp
|
[AMDGPU] add support for hostcall buffer pointer as hidden kernel argument
|
2019-11-20 15:53:55 +05:30 |
AMDGPUPromoteAlloca.cpp
|
[Alignement][NFC] Deprecate untyped CreateAlignedLoad
|
2020-01-23 13:34:32 +01:00 |
AMDGPUPropagateAttributes.cpp
|
Make llvm::StringRef to std::string conversions explicit.
|
2020-01-28 23:25:25 +01:00 |
AMDGPURegisterBankInfo.cpp
|
AMDGPU/GlobalISel: Avoid illegal vector exts for add/sub/mul
|
2020-03-09 23:42:17 -04:00 |
AMDGPURegisterBankInfo.h
|
AMDGPU/GlobalISel: Handle sbfe/ubfe intrinsic
|
2020-02-17 09:20:13 -05:00 |
AMDGPURegisterBanks.td
|
AMDGPU/GlobalISel: Replace handling of boolean values
|
2020-01-06 18:26:42 -05:00 |
AMDGPURewriteOutArguments.cpp
|
[Alignment][NFC] Use Align with CreateAlignedStore
|
2020-01-23 17:34:32 +01:00 |
AMDGPUSearchableTables.td
|
AMDGPU: llvm.amdgcn.writelane is a source of divergence
|
2020-02-12 09:12:56 +01:00 |
AMDGPUSubtarget.cpp
|
AMDGPU: Fix computation for getOccupancyWithLocalMemSize
|
2020-03-03 17:15:57 -05:00 |
AMDGPUSubtarget.h
|
[AMDGPU] Add a16 feature to gfx10
|
2020-02-10 09:04:23 +01:00 |
AMDGPUTargetMachine.cpp
|
AMDGPU/GlobalISel: Introduce post-legalize combiner
|
2020-02-24 22:12:12 -05:00 |
AMDGPUTargetMachine.h
|
…
|
|
AMDGPUTargetObjectFile.cpp
|
…
|
|
AMDGPUTargetObjectFile.h
|
…
|
|
AMDGPUTargetTransformInfo.cpp
|
[AMDGPU] Enable runtime unroll for LDS
|
2020-02-27 12:59:35 -08:00 |
AMDGPUTargetTransformInfo.h
|
AMDGPU: Analyze divergence of inline asm
|
2020-02-03 12:42:16 -08:00 |
AMDGPUUnifyDivergentExitNodes.cpp
|
AMDGPU: Fix AMDGPUUnifyDivergentExitNodes with no normal returns
|
2020-01-30 10:55:02 +01:00 |
AMDGPUUnifyMetadata.cpp
|
[AMDGPU] Fixes -Wrange-loop-analysis warnings
|
2019-12-22 19:39:28 +01:00 |
AMDILCFGStructurizer.cpp
|
Sink all InitializePasses.h includes
|
2019-11-13 16:34:37 -08:00 |
AMDKernelCodeT.h
|
…
|
|
BUFInstructions.td
|
AMDGPU: Don't use separate cache arguments for s_buffer_load node
|
2020-01-30 14:15:26 -08:00 |
CMakeLists.txt
|
AMDGPU/GlobalISel: Introduce post-legalize combiner
|
2020-02-24 22:12:12 -05:00 |
CaymanInstructions.td
|
AMDGPU/EG,CM: Implement fsqrt using recip(rsqrt(x)) instead of x * rsqrt(x)
|
2020-02-05 00:24:07 -05:00 |
DSInstructions.td
|
[AMDGPU] Fix DS_WRITE_B32 patterns
|
2020-02-19 13:42:16 -08:00 |
EvergreenInstructions.td
|
AMDGPU/EG,CM: Implement fsqrt using recip(rsqrt(x)) instead of x * rsqrt(x)
|
2020-02-05 00:24:07 -05:00 |
FLATInstructions.td
|
AMDGPU/GlobalISel: Fix not using global atomics on gfx9+
|
2020-01-27 07:42:42 -08:00 |
GCNDPPCombine.cpp
|
[AMDGPU][DPP] Corrected DPP combiner
|
2019-11-20 15:56:45 +03:00 |
GCNHazardRecognizer.cpp
|
Make more use of MachineInstr::mayLoadOrStore.
|
2019-12-19 11:51:52 +00:00 |
GCNHazardRecognizer.h
|
[AMDGPU] gfx908 hazard recognizer
|
2019-07-11 21:30:34 +00:00 |
GCNILPSched.cpp
|
Prune a LegacyDivergenceAnalysis and MachineLoopInfo include each
|
2019-10-19 01:31:09 +00:00 |
GCNIterativeScheduler.cpp
|
[AMDGPU] Add file headers for few files where it is missing.
|
2020-01-31 02:06:41 +05:30 |
GCNIterativeScheduler.h
|
[AMDGPU] Add file headers for few files where it is missing.
|
2020-01-31 02:06:41 +05:30 |
GCNMinRegStrategy.cpp
|
[AMDGPU] Add file headers for few files where it is missing.
|
2020-01-31 02:06:41 +05:30 |
GCNNSAReassign.cpp
|
AMDGPU/GFX10: Fix NSA reassign pass when operands are undef
|
2020-02-01 22:41:40 +01:00 |
GCNProcessors.td
|
[AMDGPU] gfx908 target
|
2019-07-09 18:10:06 +00:00 |
GCNRegBankReassign.cpp
|
[AMDGPU] Cleanup assumptions about generated subregs
|
2020-02-06 17:39:24 -08:00 |
GCNRegPressure.cpp
|
[AMDGPU] Fix assumption about LaneBitmask content
|
2020-02-19 09:07:11 -08:00 |
GCNRegPressure.h
|
[AMDGPU] Add file headers for few files where it is missing.
|
2020-01-31 02:06:41 +05:30 |
GCNSchedStrategy.cpp
|
[AMDGPU] Remove dubious logic in bidirectional list scheduler
|
2020-02-28 21:35:34 +00:00 |
GCNSchedStrategy.h
|
[AMDGPU] Attempt to reschedule withou clustering
|
2020-01-27 10:27:16 -08:00 |
LLVMBuild.txt
|
…
|
|
MIMGInstructions.td
|
[AMDGPU] Add a16 feature to gfx10
|
2020-02-10 09:04:23 +01:00 |
R600.td
|
…
|
|
R600AsmPrinter.cpp
|
[MC] Add MCStreamer::emitInt{8,16,32,64}
|
2020-02-29 09:40:21 -08:00 |
R600AsmPrinter.h
|
[AsmPrinter][MCStreamer] De-capitalize EmitInstruction and EmitCFI*
|
2020-02-13 22:08:55 -08:00 |
R600ClauseMergePass.cpp
|
…
|
|
R600ControlFlowFinalizer.cpp
|
[AMDGPU] Split R600 and GCN subregs
|
2020-02-10 08:29:56 -08:00 |
R600Defines.h
|
…
|
|
R600EmitClauseMarkers.cpp
|
…
|
|
R600ExpandSpecialInstrs.cpp
|
[AMDGPU] Split R600 and GCN subregs
|
2020-02-10 08:29:56 -08:00 |
R600FrameLowering.cpp
|
…
|
|
R600FrameLowering.h
|
[Alignment][NFC] Deprecate Align::None()
|
2020-01-24 12:53:58 +01:00 |
R600ISelLowering.cpp
|
AMDGPU: Move R600 test compatability hack
|
2020-02-10 10:02:06 -08:00 |
R600ISelLowering.h
|
…
|
|
R600InstrFormats.td
|
…
|
|
R600InstrInfo.cpp
|
[AMDGPU] Split R600 and GCN subregs
|
2020-02-10 08:29:56 -08:00 |
R600InstrInfo.h
|
Use MCRegister in copyPhysReg
|
2019-11-11 14:42:33 +05:30 |
R600Instructions.td
|
AMDGPU/EG,CM: Implement fsqrt using recip(rsqrt(x)) instead of x * rsqrt(x)
|
2020-02-05 00:24:07 -05:00 |
R600MachineFunctionInfo.cpp
|
…
|
|
R600MachineFunctionInfo.h
|
…
|
|
R600MachineScheduler.cpp
|
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
|
2019-08-15 19:22:08 +00:00 |
R600MachineScheduler.h
|
…
|
|
R600OpenCLImageTypeLoweringPass.cpp
|
…
|
|
R600OptimizeVectorRegisters.cpp
|
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
|
2019-08-15 19:22:08 +00:00 |
R600Packetizer.cpp
|
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
|
2019-08-15 19:22:08 +00:00 |
R600Processors.td
|
…
|
|
R600RegisterInfo.cpp
|
[TBLGEN] Allow to override RC weight
|
2020-02-14 15:49:52 -08:00 |
R600RegisterInfo.h
|
[TBLGEN] Allow to override RC weight
|
2020-02-14 15:49:52 -08:00 |
R600RegisterInfo.td
|
[TBLGEN] Allow to override RC weight
|
2020-02-14 15:49:52 -08:00 |
R600Schedule.td
|
…
|
|
R700Instructions.td
|
…
|
|
SIAddIMGInit.cpp
|
[AMDGPU] Split R600 and GCN subregs
|
2020-02-10 08:29:56 -08:00 |
SIAnnotateControlFlow.cpp
|
AMDGPU: Fix extra type mangling on llvm.amdgcn.if.break
|
2020-02-03 07:02:05 -08:00 |
SIDefines.h
|
[AMDGPU] Added MI bit IsDOT
|
2019-09-17 17:56:13 +00:00 |
SIFixSGPRCopies.cpp
|
AMDGPU/GlobalISel: Skip DAG hack passes on selected functions
|
2020-02-17 08:33:17 -08:00 |
SIFixVGPRCopies.cpp
|
…
|
|
SIFixupVectorISel.cpp
|
AMDGPU/GlobalISel: Skip DAG hack passes on selected functions
|
2020-02-17 08:33:17 -08:00 |
SIFoldOperands.cpp
|
AMDGPU: Split denormal mode tracking bits
|
2020-02-04 10:44:21 -08:00 |
SIFormMemoryClauses.cpp
|
Sink all InitializePasses.h includes
|
2019-11-13 16:34:37 -08:00 |
SIFrameLowering.cpp
|
Reapply "AMDGPU: Cleanup and fix SMRD offset handling"
|
2020-01-31 06:01:28 -08:00 |
SIFrameLowering.h
|
[Alignment][NFC] Deprecate Align::None()
|
2020-01-24 12:53:58 +01:00 |
SIISelLowering.cpp
|
[AMDGPU] SI_INDIRECT_DST_V* pseudos expansion should place EXEC restore to separate basic block
|
2020-03-10 14:04:22 +03:00 |
SIISelLowering.h
|
AMDGPU/GlobalISel: Allow arbitrary global values
|
2020-02-17 11:32:28 -08:00 |
SIInsertSkips.cpp
|
Full fix for "AMDGPU/SIInsertSkips: Fix the determination of whether early-exit-after-kill is possible" (hopefully)
|
2020-02-26 16:21:44 +01:00 |
SIInsertWaitcnts.cpp
|
[AMDGPU] Fix vccz after v_readlane/v_readfirstlane to vcc_lo/hi
|
2020-01-28 10:52:17 +00:00 |
SIInstrFormats.td
|
[AMDGPU] Add a16 feature to gfx10
|
2020-02-10 09:04:23 +01:00 |
SIInstrInfo.cpp
|
AMDGPU: Fix SMRD test in trivially disjoint mem access code
|
2020-03-05 17:14:01 +00:00 |
SIInstrInfo.h
|
Add OffsetIsScalable to getMemOperandWithOffset
|
2020-02-18 15:53:29 +00:00 |
SIInstrInfo.td
|
AMDGPU/GlobalISel: Start matching s_lshlN_add_u32 instructions
|
2020-03-09 12:36:51 -07:00 |
SIInstructions.td
|
AMDGPU: Use V_MAC_F32 for fmad.ftz
|
2020-03-10 14:41:06 -07:00 |
SILoadStoreOptimizer.cpp
|
[AMDGPU] Add a16 feature to gfx10
|
2020-02-10 09:04:23 +01:00 |
SILowerControlFlow.cpp
|
AMDGPU: Fix SI_IF lowering when the save exec reg has terminator uses
|
2020-02-09 17:59:19 -05:00 |
SILowerI1Copies.cpp
|
AMDGPU/GlobalISel: Skip DAG hack passes on selected functions
|
2020-02-17 08:33:17 -08:00 |
SILowerSGPRSpills.cpp
|
ArrayRef'ize restoreCalleeSavedRegisters. NFCI.
|
2020-02-29 09:50:23 +01:00 |
SIMachineFunctionInfo.cpp
|
AMDGPU: Refactor treatment of denormal mode
|
2019-11-19 19:55:43 +05:30 |
SIMachineFunctionInfo.h
|
AMDGPU: Split denormal mode tracking bits
|
2020-02-04 10:44:21 -08:00 |
SIMachineScheduler.cpp
|
[AMDGPU] Use generated RegisterPressureSets enum
|
2020-02-18 10:34:03 -08:00 |
SIMachineScheduler.h
|
[AMDGPU] Use generated RegisterPressureSets enum
|
2020-02-18 10:34:03 -08:00 |
SIMemoryLegalizer.cpp
|
[AMDGPU] Bundle loads before post-RA scheduler
|
2020-01-24 11:33:38 -08:00 |
SIModeRegister.cpp
|
[llvm] Migrate llvm::make_unique to std::make_unique
|
2019-08-15 15:54:37 +00:00 |
SIOptimizeExecMasking.cpp
|
AMDGPU: Use Register
|
2019-12-27 16:53:21 -05:00 |
SIOptimizeExecMaskingPreRA.cpp
|
Sink all InitializePasses.h includes
|
2019-11-13 16:34:37 -08:00 |
SIPeepholeSDWA.cpp
|
Fix unused function warning (PR44808)
|
2020-02-12 15:12:48 +01:00 |
SIPostRABundler.cpp
|
[AMDGPU] Bundle loads before post-RA scheduler
|
2020-01-24 11:33:38 -08:00 |
SIPreAllocateWWMRegs.cpp
|
Sink all InitializePasses.h includes
|
2019-11-13 16:34:37 -08:00 |
SIProgramInfo.h
|
[AMDGPU] separate accounting for agprs
|
2019-10-02 00:26:58 +00:00 |
SIRegisterInfo.cpp
|
[AMDGPU] use llvm_unreachable instead of default for rp set
|
2020-02-24 12:02:12 -08:00 |
SIRegisterInfo.h
|
[AMDGPU] Use generated RegisterPressureSets enum
|
2020-02-18 10:34:03 -08:00 |
SIRegisterInfo.td
|
[AMDGPU] Implement wave64 DWARF register mapping
|
2020-02-25 14:00:01 -05:00 |
SIRemoveShortExecBranches.cpp
|
[AMDGPU] Don't remove short branches over kills
|
2020-02-03 09:26:52 +00:00 |
SISchedule.td
|
[AMDGPU] Fix the gfx10 scheduling model for f32 conversions
|
2020-03-10 19:31:24 +00:00 |
SIShrinkInstructions.cpp
|
AMDGPU: Limit the search in finding the instruction pattern for v_swap generation.
|
2020-02-07 11:06:33 -08:00 |
SIWholeQuadMode.cpp
|
[AMDGPU] Fix non-deterministic iteration order
|
2020-02-11 09:19:30 +00:00 |
SMInstructions.td
|
AMDGPU/GlobalISel: Select llvm.amdgcn.s.buffer.load
|
2020-02-17 08:02:40 -08:00 |
SOPInstructions.td
|
AMDGPU/GlobalISel: Start matching s_lshlN_add_u32 instructions
|
2020-03-09 12:36:51 -07:00 |
VIInstrFormats.td
|
…
|
|
VIInstructions.td
|
…
|
|
VOP1Instructions.td
|
[AMDGPU] Fix the gfx10 scheduling model for f32 conversions
|
2020-03-10 19:31:24 +00:00 |
VOP2Instructions.td
|
[AMDGPU] fixed divergence driven shift operations selection
|
2020-01-31 20:49:56 +03:00 |
VOP3Instructions.td
|
AMDGPU: Remove VOP3OpSelMods0 complex pattern
|
2020-03-04 17:18:22 -05:00 |
VOP3PInstructions.td
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AMDGPU: Move dot intrinsic patterns to instruction def
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2020-02-21 13:35:40 -05:00 |
VOPCInstructions.td
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AMDGPU: Remove VOP3Mods0Clamp0OMod
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2020-01-07 15:10:08 -05:00 |
VOPInstructions.td
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[AMDGPU] copy OtherPredicates from pseudo to VOP3_Real
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2019-09-26 21:06:17 +00:00 |