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llvm-project/llvm/lib/Target/AMDGPU
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Matt Arsenault 42a26445f9 AMDGPU/GlobalISel: Fix misuse of div_scale intrinsics 
Confusingly, the intrinsic operands do not match the
instruction/custom node. The order is shuffled, and the 3rd operand is
an immediate to select operands.

I'm not 100% sure I did this right, but fdiv still doesn't select end
to end and it will be easier to tell when it does. This at least
avoids an assertion in RegBankSelect and allows hitting the fallback
on selection.
 		2019-12-21 04:55:36 -05:00
..
AsmParser [cmake] Explicitly mark libraries defined in lib/ as "Component Libraries" 2019-11-21 10:48:08 -08:00
Disassembler [AMDGPU][MC] Remove duplicate code introduced in r359316. 2019-12-04 11:44:12 +00:00
MCTargetDesc [cmake] Explicitly mark libraries defined in lib/ as "Component Libraries" 2019-11-21 10:48:08 -08:00
TargetInfo [cmake] Explicitly mark libraries defined in lib/ as "Component Libraries" 2019-11-21 10:48:08 -08:00
Utils [IR] Split out target specific intrinsic enums into separate headers 2019-12-11 18:02:14 -08:00
AMDGPU.h [IR] Split out target specific intrinsic enums into separate headers 2019-12-11 18:02:14 -08:00
AMDGPU.td [AMDGPU] w/a for gfx908 mfma SrcC literal HW bug 2019-08-23 22:09:58 +00:00
AMDGPUAliasAnalysis.cpp AMDGPU: Improve alias analysis for GDS 2019-07-17 11:22:19 +00:00
AMDGPUAliasAnalysis.h [AliasAnalysis] Second prototype to cache BasicAA / anyAA state. 2019-03-22 17:22:19 +00:00
AMDGPUAlwaysInlinePass.cpp AMDGPU: Simplify getAddressSpace calls 2019-10-31 07:51:38 -07:00
AMDGPUAnnotateKernelFeatures.cpp Use llvm::StringLiteral instead of StringRef in few places 2019-09-20 14:31:42 +00:00
AMDGPUAnnotateUniformValues.cpp Sink all InitializePasses.h includes 2019-11-13 16:34:37 -08:00
AMDGPUArgumentUsageInfo.cpp [AMDGPU] Packed thread ids in function call ABI 2019-06-28 01:52:13 +00:00
AMDGPUArgumentUsageInfo.h AMDGPU: Fix Register copypaste error 2019-09-05 23:07:10 +00:00
AMDGPUAsmPrinter.cpp AMDGPU: Refactor treatment of denormal mode 2019-11-19 19:55:43 +05:30
AMDGPUAsmPrinter.h [AMDGPU] separate accounting for agprs 2019-10-02 00:26:58 +00:00
AMDGPUAtomicOptimizer.cpp Sink all InitializePasses.h includes 2019-11-13 16:34:37 -08:00
AMDGPUCallLowering.cpp [globalisel] Rename G_GEP to G_PTR_ADD 2019-11-05 10:31:17 -08:00
AMDGPUCallLowering.h AMDGPU/GlobalISel: Rename MIRBuilder to B. NFC 2019-09-09 23:06:13 +00:00
AMDGPUCallingConv.td [AMDGPU] Adjust number of SGPRs available in Calling Convention 2019-08-28 15:00:45 +00:00
AMDGPUCodeGenPrepare.cpp AMDGPU: Refactor treatment of denormal mode 2019-11-19 19:55:43 +05:30
AMDGPUFeatures.td AMDGPU: Fix names for generation features 2019-04-03 00:01:03 +00:00
AMDGPUFixFunctionBitcasts.cpp
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AMDGPUFrameLowering.cpp Use Align for TFL::TransientStackAlignment 2019-10-21 08:31:25 +00:00
AMDGPUFrameLowering.h Use Align for TFL::TransientStackAlignment 2019-10-21 08:31:25 +00:00
AMDGPUGISel.td AMDGPU/GlobalISel: Handle flat/global G_ATOMIC_CMPXCHG 2019-10-25 13:11:09 -07:00
AMDGPUGenRegisterBankInfo.def AMDGPU/GlobalISel: Add AGPR bank and RegBankSelect mfma intrinsics 2019-12-01 22:15:48 -08:00
AMDGPUHSAMetadataStreamer.cpp [AMDGPU] add support for hostcall buffer pointer as hidden kernel argument 2019-11-20 15:53:55 +05:30
AMDGPUHSAMetadataStreamer.h [llvm] Migrate llvm::make_unique to std::make_unique 2019-08-15 15:54:37 +00:00
AMDGPUISelDAGToDAG.cpp AMDGPU: Refactor treatment of denormal mode 2019-11-19 19:55:43 +05:30
AMDGPUISelLowering.cpp Fix whitespace. 2019-12-16 10:42:34 +00:00
AMDGPUISelLowering.h AMDGPU: Select global atomicrmw fadd 2019-11-06 16:06:38 -08:00
AMDGPUInline.cpp [AMDGPU] Tune inlining parameters for AMDGPU target (part 2) 2019-11-19 16:33:16 +03:00
AMDGPUInstrInfo.cpp
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AMDGPUInstrInfo.h
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AMDGPUInstrInfo.td AMDGPU: Select basic interp directly from intrinsics 2019-10-21 21:49:44 +00:00
AMDGPUInstructionSelector.cpp AMDGPU/GlobalISel: Fix missing scc imp-def on scalar and/or/xor 2019-12-21 04:55:36 -05:00
AMDGPUInstructionSelector.h GlobalISel: Lower s1 source G_SITOFP/G_UITOFP 2019-11-15 13:37:20 +05:30
AMDGPUInstructions.td AMDGPU: Refactor treatment of denormal mode 2019-11-19 19:55:43 +05:30
AMDGPULegalizerInfo.cpp AMDGPU/GlobalISel: Fix misuse of div_scale intrinsics 2019-12-21 04:55:36 -05:00
AMDGPULegalizerInfo.h AMDGPU/GlobalISel: Legalize FDIV64 2019-11-19 21:02:27 -08:00
AMDGPULibCalls.cpp Sink all InitializePasses.h includes 2019-11-13 16:34:37 -08:00
AMDGPULibFunc.cpp [AMDGPU] Downgrade from StringLiteral to const char* in an attempt to make GCC 5 happy 2019-08-25 12:47:31 +00:00
AMDGPULibFunc.h
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AMDGPULowerIntrinsics.cpp
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AMDGPULowerKernelArguments.cpp [Alignment] Migrate Attribute::getWith(Stack)Alignment 2019-10-15 12:56:24 +00:00
AMDGPULowerKernelAttributes.cpp
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AMDGPUMCInstLower.cpp [AMDGPU] link dpp pseudos and real instructions on gfx10 2019-10-11 22:03:36 +00:00
AMDGPUMachineCFGStructurizer.cpp Sink all InitializePasses.h includes 2019-11-13 16:34:37 -08:00
AMDGPUMachineFunction.cpp AMDGPU: Refactor treatment of denormal mode 2019-11-19 19:55:43 +05:30
AMDGPUMachineFunction.h AMDGPU: Refactor treatment of denormal mode 2019-11-19 19:55:43 +05:30
AMDGPUMachineModuleInfo.cpp AMDGPU: Add support for cross address space synchronization scopes 2019-03-25 20:50:21 +00:00
AMDGPUMachineModuleInfo.h AMDGPU: Add support for cross address space synchronization scopes 2019-03-25 20:50:21 +00:00
AMDGPUMacroFusion.cpp
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AMDGPUMacroFusion.h
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AMDGPUOpenCLEnqueuedBlockLowering.cpp Fix parameter name comments using clang-tidy. NFC. 2019-07-16 04:46:31 +00:00
AMDGPUPTNote.h
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AMDGPUPerfHintAnalysis.cpp AMDGPU: Fix assert in clang test 2019-07-05 21:09:53 +00:00
AMDGPUPerfHintAnalysis.h AMDGPU: Make AMDGPUPerfHintAnalysis an SCC pass 2019-07-05 20:26:13 +00:00
AMDGPUPrintfRuntimeBinding.cpp [AMDGPU] add support for hostcall buffer pointer as hidden kernel argument 2019-11-20 15:53:55 +05:30
AMDGPUPromoteAlloca.cpp Resubmit "[Alignment][NFC] Deprecate CreateMemCpy/CreateMemMove" 2019-12-17 10:07:46 +01:00
AMDGPUPropagateAttributes.cpp AMDGPU: Move DEBUG_TYPE definition below includes 2019-07-08 18:48:39 +00:00
AMDGPURegisterBankInfo.cpp AMDGPU/GlobalISel: Simplify code 2019-12-21 04:55:36 -05:00
AMDGPURegisterBankInfo.h AMDGPU/GlobalISel: Add AGPR bank and RegBankSelect mfma intrinsics 2019-12-01 22:15:48 -08:00
AMDGPURegisterBanks.td AMDGPU/GlobalISel: Add AGPR bank and RegBankSelect mfma intrinsics 2019-12-01 22:15:48 -08:00
AMDGPURegisterInfo.cpp AMDGPU/GlobalISel: Handle more G_INSERT cases 2019-10-07 19:16:26 +00:00
AMDGPURegisterInfo.h AMDGPU/GlobalISel: Handle more G_INSERT cases 2019-10-07 19:16:26 +00:00
AMDGPURegisterInfo.td [AMDGPU] gfx908 register file changes 2019-07-09 19:41:51 +00:00
AMDGPURewriteOutArguments.cpp Sink all InitializePasses.h includes 2019-11-13 16:34:37 -08:00
AMDGPUSearchableTables.td [AMDGPU][SILoadStoreOptimizer] Merge TBUFFER loads/stores 2019-11-20 22:59:30 +01:00
AMDGPUSubtarget.cpp AMDGPU: Switch backend default max workgroup size to 1024 2019-11-13 07:11:02 +05:30
AMDGPUSubtarget.h AMDGPU: Refactor treatment of denormal mode 2019-11-19 19:55:43 +05:30
AMDGPUTargetMachine.cpp Sink all InitializePasses.h includes 2019-11-13 16:34:37 -08:00
AMDGPUTargetMachine.h MIR: Allow targets to serialize MachineFunctionInfo 2019-03-14 22:54:43 +00:00
AMDGPUTargetObjectFile.cpp
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AMDGPUTargetObjectFile.h
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AMDGPUTargetTransformInfo.cpp [AMDGPU] Implemented fma cost analysis 2019-12-18 23:54:20 -08:00
AMDGPUTargetTransformInfo.h [AMDGPU] Implemented fma cost analysis 2019-12-18 23:54:20 -08:00
AMDGPUUnifyDivergentExitNodes.cpp Sink all InitializePasses.h includes 2019-11-13 16:34:37 -08:00
AMDGPUUnifyMetadata.cpp
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AMDILCFGStructurizer.cpp Sink all InitializePasses.h includes 2019-11-13 16:34:37 -08:00
AMDKernelCodeT.h [AMDGPU] gfx1010 wave32 metadata 2019-06-17 16:48:56 +00:00
BUFInstructions.td [AMDGPU] drop getIsFP td helper 2019-10-17 21:46:56 +00:00
CMakeLists.txt [AMDGPU] Printf runtime binding pass 2019-08-12 17:12:29 +00:00
CaymanInstructions.td
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DSInstructions.td [AMDGPU] Add missing flags to DS_Real 2019-11-05 14:24:48 -08:00
EvergreenInstructions.td AMDGPU: Start redefining atomic PatFrags 2019-08-01 03:25:52 +00:00
FLATInstructions.td AMDGPU: Select global atomicrmw fadd 2019-11-06 16:06:38 -08:00
GCNDPPCombine.cpp [AMDGPU][DPP] Corrected DPP combiner 2019-11-20 15:56:45 +03:00
GCNHazardRecognizer.cpp Make more use of MachineInstr::mayLoadOrStore. 2019-12-19 11:51:52 +00:00
GCNHazardRecognizer.h [AMDGPU] gfx908 hazard recognizer 2019-07-11 21:30:34 +00:00
GCNILPSched.cpp Prune a LegacyDivergenceAnalysis and MachineLoopInfo include each 2019-10-19 01:31:09 +00:00
GCNIterativeScheduler.cpp [llvm] Migrate llvm::make_unique to std::make_unique 2019-08-15 15:54:37 +00:00
GCNIterativeScheduler.h
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GCNMinRegStrategy.cpp
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GCNNSAReassign.cpp Sink all InitializePasses.h includes 2019-11-13 16:34:37 -08:00
GCNProcessors.td [AMDGPU] gfx908 target 2019-07-09 18:10:06 +00:00
GCNRegBankReassign.cpp Sink all InitializePasses.h includes 2019-11-13 16:34:37 -08:00
GCNRegPressure.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
GCNRegPressure.h Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Register as started by r367614. NFC 2019-08-01 23:27:28 +00:00
GCNSchedStrategy.cpp [AMDGPU] Add VerifyScheduling support. 2019-10-01 15:45:47 +00:00
GCNSchedStrategy.h AMDGPU: Avoid constructing new std::vector in initCandidate 2019-09-05 22:44:06 +00:00
LLVMBuild.txt [AMDGPU] Move InstPrinter files to MCTargetDesc. NFC 2019-05-11 00:03:35 +00:00
MIMGInstructions.td [AMDGPU] deduplicate tablegen predicates 2019-11-04 12:19:17 -08:00
R600.td
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R600AsmPrinter.cpp [Alignment][NFC] Remove unneeded llvm:: scoping on Align types 2019-09-27 12:54:21 +00:00
R600AsmPrinter.h
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R600ClauseMergePass.cpp
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R600ControlFlowFinalizer.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
R600Defines.h
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R600EmitClauseMarkers.cpp
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R600ExpandSpecialInstrs.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
R600FrameLowering.cpp
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R600FrameLowering.h Use Align for TFL::TransientStackAlignment 2019-10-21 08:31:25 +00:00
R600ISelLowering.cpp [NFC] Use EVT instead of bool for getSetCCInverse() 2019-12-13 12:22:03 +00:00
R600ISelLowering.h [TargetLowering] Add MachineMemOperand::Flags to allowsMemoryAccess tests (PR42123) 2019-06-12 17:14:03 +00:00
R600InstrFormats.td
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R600InstrInfo.cpp Use MCRegister in copyPhysReg 2019-11-11 14:42:33 +05:30
R600InstrInfo.h Use MCRegister in copyPhysReg 2019-11-11 14:42:33 +05:30
R600Instructions.td AMDGPU: Redefine load PatFrags 2019-07-16 17:38:50 +00:00
R600MachineFunctionInfo.cpp
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R600MachineFunctionInfo.h
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R600MachineScheduler.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
R600MachineScheduler.h
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R600OpenCLImageTypeLoweringPass.cpp
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R600OptimizeVectorRegisters.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
R600Packetizer.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
R600Processors.td AMDGPU: Fix names for generation features 2019-04-03 00:01:03 +00:00
R600RegisterInfo.cpp Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Register as started by r367614. NFC 2019-08-01 23:27:28 +00:00
R600RegisterInfo.h CodeGen: Introduce a class for registers 2019-06-24 15:50:29 +00:00
R600RegisterInfo.td
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R600Schedule.td
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R700Instructions.td
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SIAddIMGInit.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
SIAnnotateControlFlow.cpp Sink all InitializePasses.h includes 2019-11-13 16:34:37 -08:00
SIDefines.h [AMDGPU] Added MI bit IsDOT 2019-09-17 17:56:13 +00:00
SIFixSGPRCopies.cpp Sink all InitializePasses.h includes 2019-11-13 16:34:37 -08:00
SIFixVGPRCopies.cpp
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SIFixupVectorISel.cpp Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Register as started by r367614. NFC 2019-08-01 23:27:28 +00:00
SIFoldOperands.cpp AMDGPU: Avoid folding 2 constant operands into an SALU operation 2019-12-04 10:25:34 +00:00
SIFormMemoryClauses.cpp Sink all InitializePasses.h includes 2019-11-13 16:34:37 -08:00
SIFrameLowering.cpp [AArch64] Static (de)allocation of SVE stack objects. 2019-10-03 11:33:50 +00:00
SIFrameLowering.h Use Align for TFL::TransientStackAlignment 2019-10-21 08:31:25 +00:00
SIISelLowering.cpp Revert "AMDGPU: Try to commute sub of boolean ext" 2019-12-13 12:49:06 +00:00
SIISelLowering.h AMDGPU: Refactor treatment of denormal mode 2019-11-19 19:55:43 +05:30
SIInsertSkips.cpp [AMDGPU] gfx10 conditional registers handling 2019-06-16 17:13:09 +00:00
SIInsertWaitcnts.cpp Make more use of MachineInstr::mayLoadOrStore. 2019-12-19 11:51:52 +00:00
SIInstrFormats.td [AMDGPU] Added MI bit IsDOT 2019-09-17 17:56:13 +00:00
SIInstrInfo.cpp Make more use of MachineInstr::mayLoadOrStore. 2019-12-19 11:51:52 +00:00
SIInstrInfo.h [AMDGPU][GFX10] Disabled v_movrel*[sdwa|dpp] opcodes in codegen 2019-11-20 17:57:50 +03:00
SIInstrInfo.td AMDGPU: Select global atomicrmw fadd 2019-11-06 16:06:38 -08:00
SIInstructions.td AMDGPU/GlobalISel: Handle flat/global G_ATOMIC_CMPXCHG 2019-10-25 13:11:09 -07:00
SILoadStoreOptimizer.cpp AMDGPU/SILoadStoreOptimillzer: Refactor CombineInfo struct 2019-12-17 13:43:10 -08:00
SILowerControlFlow.cpp [AMDGPU] Fix emitIfBreak CF lowering: use temp reg to make register coalescer life easier. 2019-11-26 18:59:37 +03:00
SILowerI1Copies.cpp Sink all InitializePasses.h includes 2019-11-13 16:34:37 -08:00
SILowerSGPRSpills.cpp Sink all InitializePasses.h includes 2019-11-13 16:34:37 -08:00
SIMachineFunctionInfo.cpp AMDGPU: Refactor treatment of denormal mode 2019-11-19 19:55:43 +05:30
SIMachineFunctionInfo.h AMDGPU: Refactor treatment of denormal mode 2019-11-19 19:55:43 +05:30
SIMachineScheduler.cpp AMDGPU/SI: make ~SIScheduleBlockCreator trivial 2019-11-11 21:51:59 -08:00
SIMachineScheduler.h AMDGPU/SI: make ~SIScheduleBlockCreator trivial 2019-11-11 21:51:59 -08:00
SIMemoryLegalizer.cpp [llvm] Migrate llvm::make_unique to std::make_unique 2019-08-15 15:54:37 +00:00
SIModeRegister.cpp [llvm] Migrate llvm::make_unique to std::make_unique 2019-08-15 15:54:37 +00:00
SIOptimizeExecMasking.cpp Sink all InitializePasses.h includes 2019-11-13 16:34:37 -08:00
SIOptimizeExecMaskingPreRA.cpp Sink all InitializePasses.h includes 2019-11-13 16:34:37 -08:00
SIPeepholeSDWA.cpp AMDGPU: Fixed indeterminate map iteration in SIPeepholeSDWA 2019-12-02 12:08:49 +00:00
SIPreAllocateWWMRegs.cpp Sink all InitializePasses.h includes 2019-11-13 16:34:37 -08:00
SIProgramInfo.h [AMDGPU] separate accounting for agprs 2019-10-02 00:26:58 +00:00
SIRegisterInfo.cpp Fix broken comment phrasing and indentation 2019-12-02 12:23:20 +05:30
SIRegisterInfo.h AMDGPU/GlobalISel: Add AGPR bank and RegBankSelect mfma intrinsics 2019-12-01 22:15:48 -08:00
SIRegisterInfo.td AMDGPU: Make VReg_1 only include 1 artificial register 2019-10-28 20:51:51 -07:00
SISchedule.td [AMDGPU] gfx908 scheduling 2019-07-11 21:25:00 +00:00
SIShrinkInstructions.cpp AMDGPU: Don't fold S_NOPs with implicit operands 2019-10-30 14:40:56 -07:00
SIWholeQuadMode.cpp Sink all InitializePasses.h includes 2019-11-13 16:34:37 -08:00
SMInstructions.td [AMDGPU] deduplicate tablegen predicates 2019-11-04 12:19:17 -08:00
SOPInstructions.td [AMDGPU] deduplicate tablegen predicates 2019-11-04 12:19:17 -08:00
VIInstrFormats.td
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VIInstructions.td
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VOP1Instructions.td [AMDGPU][MC][GFX10] Enabled v_movrel*[sdwa|dpp|dpp8] opcodes 2019-11-18 17:23:40 +03:00
VOP2Instructions.td [AMDGPU] deduplicate tablegen predicates 2019-11-04 12:19:17 -08:00
VOP3Instructions.td [AMDGPU] deduplicate tablegen predicates 2019-11-04 12:19:17 -08:00
VOP3PInstructions.td [AMDGPU] deduplicate tablegen predicates 2019-11-04 12:19:17 -08:00
VOPCInstructions.td [AMDGPU] deduplicate tablegen predicates 2019-11-04 12:19:17 -08:00
VOPInstructions.td [AMDGPU] copy OtherPredicates from pseudo to VOP3_Real 2019-09-26 21:06:17 +00:00